| Andre Przywara | f98852b | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 1 | / { |
| 2 | aliases { |
| 3 | ethernet0 = &emac; |
| 4 | }; |
| 5 | |
| 6 | soc { |
| 7 | emac: ethernet@01c30000 { |
| 8 | compatible = "allwinner,sun50i-a64-emac"; |
| 9 | reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; |
| 10 | reg-names = "emac", "syscon"; |
| 11 | interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; |
| 12 | resets = <&ccu RST_BUS_EMAC>; |
| 13 | reset-names = "ahb"; |
| 14 | clocks = <&ccu CLK_BUS_EMAC>; |
| 15 | clock-names = "ahb"; |
| 16 | #address-cells = <1>; |
| 17 | #size-cells = <0>; |
| 18 | pinctrl-names = "default"; |
| 19 | pinctrl-0 = <&rgmii_pins>; |
| 20 | phy-mode = "rgmii"; |
| 21 | phy = <&phy1>; |
| 22 | status = "okay"; |
| 23 | |
| 24 | phy1: ethernet-phy@1 { |
| 25 | reg = <1>; |
| 26 | }; |
| 27 | }; |
| 28 | }; |
| 29 | }; |
| 30 | |
| 31 | &pio { |
| 32 | rmii_pins: rmii_pins { |
| 33 | allwinner,pins = "PD10", "PD11", "PD13", "PD14", |
| 34 | "PD17", "PD18", "PD19", "PD20", |
| 35 | "PD22", "PD23"; |
| 36 | allwinner,function = "emac"; |
| 37 | allwinner,drive = <3>; |
| 38 | allwinner,pull = <0>; |
| 39 | }; |
| 40 | |
| 41 | rgmii_pins: rgmii_pins { |
| 42 | allwinner,pins = "PD8", "PD9", "PD10", "PD11", |
| 43 | "PD12", "PD13", "PD15", |
| 44 | "PD16", "PD17", "PD18", "PD19", |
| 45 | "PD20", "PD21", "PD22", "PD23"; |
| 46 | allwinner,function = "emac"; |
| 47 | allwinner,drive = <3>; |
| 48 | allwinner,pull = <0>; |
| 49 | }; |
| 50 | }; |