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wdenk5b845b62002-08-21 21:57:24 +00001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * Note that this is just boilerplate - there is no Altera support yet.
27 */
28
29
30/*
31 * Altera FPGA support
32 */
33#include <common.h>
34#include <fpga.h> /* Generic FPGA support */
35#include <altera.h> /* Altera specific stuff */
36
37#if 0
38#define FPGA_DEBUG
39#endif
40
41#ifdef FPGA_DEBUG
42#define PRINTF(fmt,args...) printf (fmt ,##args)
43#else
44#define PRINTF(fmt,args...)
45#endif
46
47#if (CONFIG_FPGA & CFG_FPGA_ALTERA)
48
49/* ------------------------------------------------------------------------- */
50int altera_load( Altera_desc *desc, void *buf, size_t bsize )
51{
52 printf( "No support for Altera devices yet.\n" );
53 return FPGA_FAIL;
54}
55
56int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
57{
58 printf( "No support for Altera devices yet.\n" );
59 return FPGA_FAIL;
60}
61
62int altera_info( Altera_desc *desc )
63{
64 printf( "No support for Altera devices yet.\n" );
65 return FPGA_FAIL;
66}
67
68/* ------------------------------------------------------------------------- */
69
70
71/* ------------------------------------------------------------------------- */
72
73#endif /* CONFIG_FPGA & CFG_FPGA_ALTERA */