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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 57212ff031c30b5c9e57a8fd5366ed2f517d8700 / . / arch / arm / dts / stm32mp157-u-boot.dtsi
blob: 0d1d387e5400641c06abe8cb5683fe7042edf107 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]2/*
3 * Copyright : STMicroelectronics 2018
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]4 */
5
6/ {
7 aliases {
8 gpio0 = &gpioa;
9 gpio1 = &gpiob;
10 gpio2 = &gpioc;
11 gpio3 = &gpiod;
12 gpio4 = &gpioe;
13 gpio5 = &gpiof;
14 gpio6 = &gpiog;
15 gpio7 = &gpioh;
16 gpio8 = &gpioi;
17 gpio9 = &gpioj;
18 gpio10 = &gpiok;
19 gpio25 = &gpioz;
Patrick Delaunay1258e462019-04-12 14:38:28 +0200[diff] [blame]20 pinctrl0 = &pinctrl;
21 pinctrl1 = &pinctrl_z;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]22 };
23
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200[diff] [blame]24 clocks {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]25 u-boot,dm-pre-reloc;
26 };
27
Patrick Delaunay67b76842019-07-30 19:16:15 +0200[diff] [blame]28 /* need PSCI for sysreset during board_f */
29 psci {
30 u-boot,dm-pre-proper;
31 };
32
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200[diff] [blame]33 reboot {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]34 u-boot,dm-pre-reloc;
35 };
36
37 soc {
38 u-boot,dm-pre-reloc;
Patrick Delaunaye16750f2018-03-20 11:45:14 +0100[diff] [blame]39 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]40};
41
Patrick Delaunaybfe1f082019-02-27 17:01:27 +0100[diff] [blame]42&bsec {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200[diff] [blame]43 u-boot,dm-pre-proper;
44};
45
46&clk_csi {
Patrick Delaunaybfe1f082019-02-27 17:01:27 +0100[diff] [blame]47 u-boot,dm-pre-reloc;
48};
49
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]50&clk_hsi {
51 u-boot,dm-pre-reloc;
52};
53
54&clk_hse {
55 u-boot,dm-pre-reloc;
56};
57
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]58&clk_lsi {
59 u-boot,dm-pre-reloc;
60};
61
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200[diff] [blame]62&clk_lse {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]63 u-boot,dm-pre-reloc;
64};
65
66&gpioa {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]67 u-boot,dm-pre-reloc;
68};
69
70&gpiob {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]71 u-boot,dm-pre-reloc;
72};
73
74&gpioc {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]75 u-boot,dm-pre-reloc;
76};
77
78&gpiod {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]79 u-boot,dm-pre-reloc;
80};
81
82&gpioe {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]83 u-boot,dm-pre-reloc;
84};
85
86&gpiof {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]87 u-boot,dm-pre-reloc;
88};
89
90&gpiog {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]91 u-boot,dm-pre-reloc;
92};
93
94&gpioh {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]95 u-boot,dm-pre-reloc;
96};
97
98&gpioi {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]99 u-boot,dm-pre-reloc;
100};
101
102&gpioj {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]103 u-boot,dm-pre-reloc;
104};
105
106&gpiok {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]107 u-boot,dm-pre-reloc;
108};
109
110&gpioz {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100[diff] [blame]111 u-boot,dm-pre-reloc;
112};
Patrice Chotard75500a42019-04-30 17:26:21 +0200[diff] [blame]113
Patrick Delaunay6d923002019-07-30 19:16:14 +0200[diff] [blame]114&iwdg2 {
115 u-boot,dm-pre-reloc;
116};
117
Patrick Delaunay2c258092019-07-30 19:16:16 +0200[diff] [blame]118/* pre-reloc probe = reserve video frame buffer in video_reserve() */
119&ltdc {
120 u-boot,dm-pre-proper;
121};
122
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200[diff] [blame]123&pinctrl {
Patrice Chotard75500a42019-04-30 17:26:21 +0200[diff] [blame]124 u-boot,dm-pre-reloc;
125};
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200[diff] [blame]126
127&pinctrl_z {
128 u-boot,dm-pre-reloc;
129};
130
131&pwr {
132 u-boot,dm-pre-reloc;
133};
134
135&rcc {
136 u-boot,dm-pre-reloc;
137};
138
139&sdmmc1 {
140 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
141};
142
143&sdmmc2 {
144 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
145};
146
147&sdmmc3 {
148 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
149};
150
151&usbotg_hs {
152 compatible = "st,stm32mp1-hsotg", "snps,dwc2";
153};