blob: 3cf279d6a3a9763c8fd15573bda7026e84df3ba3 [file] [log] [blame]
Dario Binacchi756d64e2020-12-30 00:06:34 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * TI DPLL x2 clock support
4 *
5 * Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
6 *
7 * Loosely based on Linux kernel drivers/clk/ti/dpll.c
8 */
9
10#include <common.h>
11#include <clk-uclass.h>
12#include <dm.h>
13#include <dm/device_compat.h>
14#include <linux/clk-provider.h>
15
16struct clk_ti_am3_dpll_x2_priv {
17 struct clk parent;
18};
19
20static ulong clk_ti_am3_dpll_x2_get_rate(struct clk *clk)
21{
22 struct clk_ti_am3_dpll_x2_priv *priv = dev_get_priv(clk->dev);
23 unsigned long rate;
24
25 rate = clk_get_rate(&priv->parent);
26 if (IS_ERR_VALUE(rate))
27 return rate;
28
29 rate *= 2;
30 dev_dbg(clk->dev, "rate=%ld\n", rate);
31 return rate;
32}
33
34const struct clk_ops clk_ti_am3_dpll_x2_ops = {
35 .get_rate = clk_ti_am3_dpll_x2_get_rate,
36};
37
38static int clk_ti_am3_dpll_x2_remove(struct udevice *dev)
39{
40 struct clk_ti_am3_dpll_x2_priv *priv = dev_get_priv(dev);
41 int err;
42
43 err = clk_release_all(&priv->parent, 1);
44 if (err) {
45 dev_err(dev, "failed to release parent clock\n");
46 return err;
47 }
48
49 return 0;
50}
51
52static int clk_ti_am3_dpll_x2_probe(struct udevice *dev)
53{
54 struct clk_ti_am3_dpll_x2_priv *priv = dev_get_priv(dev);
55 int err;
56
57 err = clk_get_by_index(dev, 0, &priv->parent);
58 if (err) {
59 dev_err(dev, "%s: failed to get parent clock\n", __func__);
60 return err;
61 }
62
63 return 0;
64}
65
66static const struct udevice_id clk_ti_am3_dpll_x2_of_match[] = {
67 {.compatible = "ti,am3-dpll-x2-clock"},
68 {}
69};
70
71U_BOOT_DRIVER(clk_ti_am3_dpll_x2) = {
72 .name = "ti_am3_dpll_x2_clock",
73 .id = UCLASS_CLK,
74 .of_match = clk_ti_am3_dpll_x2_of_match,
75 .probe = clk_ti_am3_dpll_x2_probe,
76 .remove = clk_ti_am3_dpll_x2_remove,
77 .priv_auto = sizeof(struct clk_ti_am3_dpll_x2_priv),
78 .ops = &clk_ti_am3_dpll_x2_ops,
79};