| Stephen Warren | b9ae641 | 2016-10-19 15:18:45 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, NVIDIA CORPORATION. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0 |
| 5 | */ |
| 6 | |
| 7 | #include <config.h> |
| 8 | #include <linux/linkage.h> |
| 9 | |
| 10 | #define SMC_SIP_INVOKE_MCE 0x82FFFF00 |
| 11 | #define MCE_SMC_ROC_FLUSH_CACHE (SMC_SIP_INVOKE_MCE | 11) |
| Stephen Warren | a8d0526 | 2016-10-19 15:18:47 -0600 | [diff] [blame] | 12 | #define MCE_SMC_ROC_FLUSH_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 14) |
| 13 | #define MCE_SMC_ROC_CLEAN_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 15) |
| Stephen Warren | b9ae641 | 2016-10-19 15:18:45 -0600 | [diff] [blame] | 14 | |
| Stephen Warren | a8d0526 | 2016-10-19 15:18:47 -0600 | [diff] [blame] | 15 | ENTRY(__asm_tegra_cache_smc) |
| Stephen Warren | b9ae641 | 2016-10-19 15:18:45 -0600 | [diff] [blame] | 16 | mov x1, #0 |
| 17 | mov x2, #0 |
| 18 | mov x3, #0 |
| 19 | mov x4, #0 |
| 20 | mov x5, #0 |
| 21 | mov x6, #0 |
| 22 | smc #0 |
| 23 | mov x0, #0 |
| 24 | ret |
| Stephen Warren | a8d0526 | 2016-10-19 15:18:47 -0600 | [diff] [blame] | 25 | ENDPROC(__asm_invalidate_l3_dcache) |
| 26 | |
| 27 | ENTRY(__asm_invalidate_l3_dcache) |
| 28 | mov x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY & 0xffff) |
| 29 | movk x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY >> 16), lsl #16 |
| 30 | b __asm_tegra_cache_smc |
| 31 | ENDPROC(__asm_invalidate_l3_dcache) |
| 32 | |
| 33 | ENTRY(__asm_flush_l3_dcache) |
| 34 | mov x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY & 0xffff) |
| 35 | movk x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY >> 16), lsl #16 |
| 36 | b __asm_tegra_cache_smc |
| Stephen Warren | 1ab557a | 2016-10-19 15:18:46 -0600 | [diff] [blame] | 37 | ENDPROC(__asm_flush_l3_dcache) |
| Stephen Warren | a8d0526 | 2016-10-19 15:18:47 -0600 | [diff] [blame] | 38 | |
| 39 | ENTRY(__asm_invalidate_l3_icache) |
| 40 | mov x0, #(MCE_SMC_ROC_FLUSH_CACHE & 0xffff) |
| 41 | movk x0, #(MCE_SMC_ROC_FLUSH_CACHE >> 16), lsl #16 |
| 42 | b __asm_tegra_cache_smc |
| 43 | ENDPROC(__asm_invalidate_l3_icache) |