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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Álvaro Fernández Rojas3483f282018-01-20 19:16:04 +01002/*
3 * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
4 *
5 * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
Álvaro Fernández Rojas3483f282018-01-20 19:16:04 +01006 */
7
8#ifndef __DT_BINDINGS_CLOCK_BCM6318_H
9#define __DT_BINDINGS_CLOCK_BCM6318_H
10
11#define BCM6318_CLK_ADSL_ASB 0
12#define BCM6318_CLK_USB_ASB 1
13#define BCM6318_CLK_MIPS_ASB 2
14#define BCM6318_CLK_PCIE_ASB 3
15#define BCM6318_CLK_PHYMIPS_ASB 4
16#define BCM6318_CLK_ROBOSW_ASB 5
17#define BCM6318_CLK_SAR_ASB 6
18#define BCM6318_CLK_SDR_ASB 7
19#define BCM6318_CLK_SWREG_ASB 8
20#define BCM6318_CLK_PERIPH_ASB 9
21#define BCM6318_CLK_CPUBUS160 10
22#define BCM6318_CLK_ADSL 11
23#define BCM6318_CLK_SAR125 12
24#define BCM6318_CLK_MIPS 13
25#define BCM6318_CLK_PCIE 14
26#define BCM6318_CLK_ROBOSW250 16
27#define BCM6318_CLK_ROBOSW025 17
28#define BCM6318_CLK_SDR 19
29#define BCM6318_CLK_USB 20
30#define BCM6318_CLK_HSSPI 25
31#define BCM6318_CLK_PCIE25 27
32#define BCM6318_CLK_PHYMIPS 28
33#define BCM6318_CLK_AFE 29
34#define BCM6318_CLK_QPROC 30
35
Álvaro Fernández Rojas93bd64b2018-12-01 19:00:41 +010036#define BCM6318_UCLK_ADSL 0
37#define BCM6318_UCLK_ARB 1
38#define BCM6318_UCLK_MIPS 2
39#define BCM6318_UCLK_PCIE 3
40#define BCM6318_UCLK_PERIPH 4
41#define BCM6318_UCLK_PHYMIPS 5
42#define BCM6318_UCLK_ROBOSW 6
43#define BCM6318_UCLK_SAR 7
44#define BCM6318_UCLK_SDR 8
45#define BCM6318_UCLK_USB 9
46
Álvaro Fernández Rojas3483f282018-01-20 19:16:04 +010047#endif /* __DT_BINDINGS_CLOCK_BCM6318_H */