| Fabio Estevam | 57ca432 | 2013-04-10 09:32:58 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; either version 2 of |
| 9 | * the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <asm/arch/clock.h> |
| 13 | #include <asm/arch/iomux.h> |
| 14 | #include <asm/arch/imx-regs.h> |
| 15 | #include <asm/arch/mx6-pins.h> |
| 16 | #include <asm/arch/sys_proto.h> |
| 17 | #include <asm/gpio.h> |
| 18 | #include <asm/imx-common/iomux-v3.h> |
| 19 | #include <asm/io.h> |
| 20 | #include <asm/sizes.h> |
| 21 | #include <common.h> |
| 22 | #include <fsl_esdhc.h> |
| 23 | #include <mmc.h> |
| 24 | |
| 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
| 27 | #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 28 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 29 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 30 | |
| 31 | #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
| 32 | PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ |
| 33 | PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 34 | |
| 35 | int dram_init(void) |
| 36 | { |
| 37 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
| 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | static iomux_v3_cfg_t const uart1_pads[] = { |
| 43 | MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 44 | MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 45 | }; |
| 46 | |
| 47 | static iomux_v3_cfg_t const usdhc2_pads[] = { |
| 48 | MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 49 | MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 50 | MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 51 | MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 52 | MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 53 | MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
| 54 | }; |
| 55 | |
| 56 | static void setup_iomux_uart(void) |
| 57 | { |
| 58 | imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
| 59 | } |
| 60 | |
| 61 | static struct fsl_esdhc_cfg usdhc_cfg[1] = { |
| 62 | {USDHC2_BASE_ADDR}, |
| 63 | }; |
| 64 | |
| 65 | int board_mmc_getcd(struct mmc *mmc) |
| 66 | { |
| 67 | return 1; /* Assume boot SD always present */ |
| 68 | } |
| 69 | |
| 70 | int board_mmc_init(bd_t *bis) |
| 71 | { |
| 72 | imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); |
| 73 | |
| 74 | usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); |
| 75 | return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); |
| 76 | } |
| 77 | |
| 78 | int board_early_init_f(void) |
| 79 | { |
| 80 | setup_iomux_uart(); |
| 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | int board_init(void) |
| 85 | { |
| 86 | /* address of boot parameters */ |
| 87 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
| 88 | |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | u32 get_board_rev(void) |
| 93 | { |
| 94 | return get_cpu_rev(); |
| 95 | } |
| 96 | |
| 97 | int checkboard(void) |
| 98 | { |
| 99 | puts("Board: MX6SLEVK\n"); |
| 100 | |
| 101 | return 0; |
| 102 | } |