Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2011 Samsung Electronics |
| 4 | * |
Chander Kashyap | 393cb36 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 5 | * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 8 | #ifndef __CONFIG_ORIGEN_H |
| 9 | #define __CONFIG_ORIGEN_H |
| 10 | |
Simon Glass | 4c7bb1d | 2014-10-07 22:01:44 -0600 | [diff] [blame] | 11 | #include <configs/exynos4-common.h> |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 12 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 13 | /* High Level Configuration Options */ |
Chander Kashyap | 393cb36 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 14 | #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 15 | #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ |
| 16 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 17 | #define CONFIG_SYS_DCACHE_OFF 1 |
| 18 | |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 19 | /* ORIGEN has 4 bank of DRAM */ |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 20 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 21 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
| 22 | #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ |
| 23 | |
| 24 | /* memtest works on */ |
| 25 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 26 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) |
| 27 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) |
| 28 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 29 | #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN |
| 30 | |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 31 | /* select serial console configuration */ |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 32 | |
| 33 | /* Console configuration */ |
Piotr Wilczek | bf7716d | 2014-03-07 14:59:46 +0100 | [diff] [blame] | 34 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" |
| 35 | |
| 36 | #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ |
| 37 | |
| 38 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
| 39 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 40 | /* Power Down Modes */ |
| 41 | #define S5P_CHECK_SLEEP 0x00000BAD |
| 42 | #define S5P_CHECK_DIDLE 0xBAD00000 |
| 43 | #define S5P_CHECK_LPA 0xABAD0000 |
| 44 | |
Chander Kashyap | 98a48c5 | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 45 | /* MMC SPL */ |
Chander Kashyap | 98a48c5 | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 46 | #define COPY_BL2_FNPTR_ADDR 0x02020030 |
Inderpal Singh | 8a00061 | 2013-04-04 23:09:21 +0000 | [diff] [blame] | 47 | #define CONFIG_SPL_TEXT_BASE 0x02021410 |
| 48 | |
Guillaume GARDET | 7741c8b | 2014-10-08 15:04:38 +0200 | [diff] [blame] | 49 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 50 | "loadaddr=0x40007000\0" \ |
| 51 | "rdaddr=0x48000000\0" \ |
| 52 | "kerneladdr=0x40007000\0" \ |
| 53 | "ramdiskaddr=0x48000000\0" \ |
| 54 | "console=ttySAC2,115200n8\0" \ |
| 55 | "mmcdev=0\0" \ |
| 56 | "bootenv=uEnv.txt\0" \ |
| 57 | "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ |
| 58 | "importbootenv=echo Importing environment from mmc ...; " \ |
| 59 | "env import -t $loadaddr $filesize\0" \ |
| 60 | "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 61 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ |
| 62 | "source ${loadaddr}\0" |
| 63 | #define CONFIG_BOOTCOMMAND \ |
| 64 | "if mmc rescan; then " \ |
| 65 | "echo SD/MMC found on device ${mmcdev};" \ |
| 66 | "if run loadbootenv; then " \ |
| 67 | "echo Loaded environment from ${bootenv};" \ |
| 68 | "run importbootenv;" \ |
| 69 | "fi;" \ |
| 70 | "if test -n $uenvcmd; then " \ |
| 71 | "echo Running uenvcmd ...;" \ |
| 72 | "run uenvcmd;" \ |
| 73 | "fi;" \ |
| 74 | "if run loadbootscript; then " \ |
| 75 | "run bootscript; " \ |
| 76 | "fi; " \ |
| 77 | "fi;" \ |
| 78 | "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 79 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 80 | #define CONFIG_CLK_1000_400_200 |
| 81 | |
| 82 | /* MIU (Memory Interleaving Unit) */ |
| 83 | #define CONFIG_MIU_2BIT_21_7_INTERLEAVED |
| 84 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 85 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 86 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ |
| 87 | #define RESERVE_BLOCK_SIZE (512) |
| 88 | #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ |
| 89 | #define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE) |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 90 | |
Rajeshwari Shinde | 643be9c | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 91 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) |
| 92 | |
| 93 | #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 |
Chander Kashyap | 98a48c5 | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 94 | |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 95 | /* U-Boot copy size from boot Media to DRAM.*/ |
Chander Kashyap | 98a48c5 | 2011-08-18 22:37:20 +0000 | [diff] [blame] | 96 | #define COPY_BL2_SIZE 0x80000 |
| 97 | #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) |
| 98 | #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) |
Angus Ainslie | 099e884 | 2011-09-09 12:02:02 +0000 | [diff] [blame] | 99 | |
Chander Kashyap | b9a1ef2 | 2011-08-18 22:37:19 +0000 | [diff] [blame] | 100 | #endif /* __CONFIG_H */ |