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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk38635852002-08-27 05:55:31 +00002/*
3 * (C) Copyright 2000
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenk38635852002-08-27 05:55:31 +00005 */
6
7/*
8 * Cache support: switch on or off, get status
9 */
10#include <common.h>
11#include <command.h>
Simon Glass9edefc22019-11-14 12:57:37 -070012#include <cpu_func.h>
Matthew McClintockd0c4c332011-05-24 10:09:05 +000013#include <linux/compiler.h>
wdenk38635852002-08-27 05:55:31 +000014
Matthew McClintockd0c4c332011-05-24 10:09:05 +000015static int parse_argv(const char *);
16
Stefan Kristiansson23498932011-10-31 18:21:12 +000017void __weak invalidate_icache_all(void)
Matthew McClintockd0c4c332011-05-24 10:09:05 +000018{
Stefan Kristiansson23498932011-10-31 18:21:12 +000019 /* please define arch specific invalidate_icache_all */
20 puts("No arch specific invalidate_icache_all available!\n");
Matthew McClintockd0c4c332011-05-24 10:09:05 +000021}
wdenk38635852002-08-27 05:55:31 +000022
Patrice Chotardc2a21232020-04-28 11:38:03 +020023__weak void noncached_set_region(void)
24{
25}
26
Jeroen Hofstee0e350f82014-06-23 00:22:08 +020027static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000028{
29 switch (argc) {
Eric Perief043dc22019-07-13 14:54:58 -040030 case 2: /* on / off / flush */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000031 switch (parse_argv(argv[1])) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000032 case 0:
33 icache_disable();
wdenk38635852002-08-27 05:55:31 +000034 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000035 case 1:
36 icache_enable();
wdenk38635852002-08-27 05:55:31 +000037 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000038 case 2:
39 invalidate_icache_all();
Matthew McClintockd0c4c332011-05-24 10:09:05 +000040 break;
Eric Perief043dc22019-07-13 14:54:58 -040041 default:
42 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000043 }
Joe Hershberger36180d92012-10-03 10:56:17 +000044 break;
wdenk38635852002-08-27 05:55:31 +000045 case 1: /* get status */
Joe Hershbergere9455fc2012-10-03 10:56:16 +000046 printf("Instruction Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000047 icache_status() ? "ON" : "OFF");
48 return 0;
49 default:
Simon Glass4c12eeb2011-12-10 08:44:01 +000050 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000051 }
52 return 0;
53}
54
Stefan Kristiansson23498932011-10-31 18:21:12 +000055void __weak flush_dcache_all(void)
Matthew McClintockd0c4c332011-05-24 10:09:05 +000056{
Stefan Kristiansson23498932011-10-31 18:21:12 +000057 puts("No arch specific flush_dcache_all available!\n");
58 /* please define arch specific flush_dcache_all */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000059}
60
Jeroen Hofstee0e350f82014-06-23 00:22:08 +020061static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk38635852002-08-27 05:55:31 +000062{
63 switch (argc) {
Eric Perief043dc22019-07-13 14:54:58 -040064 case 2: /* on / off / flush */
Matthew McClintockd0c4c332011-05-24 10:09:05 +000065 switch (parse_argv(argv[1])) {
Joe Hershbergere9455fc2012-10-03 10:56:16 +000066 case 0:
67 dcache_disable();
wdenk38635852002-08-27 05:55:31 +000068 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000069 case 1:
70 dcache_enable();
Patrice Chotardc2a21232020-04-28 11:38:03 +020071 noncached_set_region();
wdenk38635852002-08-27 05:55:31 +000072 break;
Joe Hershbergere9455fc2012-10-03 10:56:16 +000073 case 2:
74 flush_dcache_all();
Matthew McClintockd0c4c332011-05-24 10:09:05 +000075 break;
Eric Perief043dc22019-07-13 14:54:58 -040076 default:
77 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000078 }
Joe Hershbergere9455fc2012-10-03 10:56:16 +000079 break;
wdenk38635852002-08-27 05:55:31 +000080 case 1: /* get status */
Joe Hershbergere9455fc2012-10-03 10:56:16 +000081 printf("Data (writethrough) Cache is %s\n",
wdenk38635852002-08-27 05:55:31 +000082 dcache_status() ? "ON" : "OFF");
83 return 0;
84 default:
Simon Glass4c12eeb2011-12-10 08:44:01 +000085 return CMD_RET_USAGE;
wdenk38635852002-08-27 05:55:31 +000086 }
87 return 0;
wdenk38635852002-08-27 05:55:31 +000088}
89
Matthew McClintockd0c4c332011-05-24 10:09:05 +000090static int parse_argv(const char *s)
wdenk38635852002-08-27 05:55:31 +000091{
Joe Hershbergere9455fc2012-10-03 10:56:16 +000092 if (strcmp(s, "flush") == 0)
93 return 2;
94 else if (strcmp(s, "on") == 0)
95 return 1;
96 else if (strcmp(s, "off") == 0)
97 return 0;
98
99 return -1;
wdenk38635852002-08-27 05:55:31 +0000100}
101
wdenk8bde7f72003-06-27 21:31:46 +0000102
wdenk0d498392003-07-01 21:06:45 +0000103U_BOOT_CMD(
104 icache, 2, 1, do_icache,
Peter Tyser2fb26042009-01-27 18:03:12 -0600105 "enable or disable instruction cache",
Matthew McClintockd0c4c332011-05-24 10:09:05 +0000106 "[on, off, flush]\n"
107 " - enable, disable, or flush instruction cache"
wdenk8bde7f72003-06-27 21:31:46 +0000108);
109
wdenk0d498392003-07-01 21:06:45 +0000110U_BOOT_CMD(
111 dcache, 2, 1, do_dcache,
Peter Tyser2fb26042009-01-27 18:03:12 -0600112 "enable or disable data cache",
Matthew McClintockd0c4c332011-05-24 10:09:05 +0000113 "[on, off, flush]\n"
114 " - enable, disable, or flush data (writethrough) cache"
wdenk8bde7f72003-06-27 21:31:46 +0000115);