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Marek Vasutf4f680a2011-11-08 23:18:12 +00001/*
2 * Freescale i.MX28 I2C Driver
3 *
4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5 * on behalf of DENX Software Engineering GmbH
6 *
7 * Partly based on Linux kernel i2c-mxs.c driver:
8 * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
9 *
10 * Which was based on a (non-working) driver which was:
11 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
12 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020013 * SPDX-License-Identifier: GPL-2.0+
Marek Vasutf4f680a2011-11-08 23:18:12 +000014 */
15
16#include <common.h>
17#include <malloc.h>
Marek Vasutfa5e2842012-11-30 18:17:07 +000018#include <i2c.h>
Marek Vasutf4f680a2011-11-08 23:18:12 +000019#include <asm/errno.h>
20#include <asm/io.h>
21#include <asm/arch/clock.h>
22#include <asm/arch/imx-regs.h>
23#include <asm/arch/sys_proto.h>
24
25#define MXS_I2C_MAX_TIMEOUT 1000000
26
Marek Vasut95360992014-10-20 00:23:40 +020027static struct mxs_i2c_regs *mxs_i2c_get_base(struct i2c_adapter *adap)
28{
29 return (struct mxs_i2c_regs *)MXS_I2C0_BASE;
30}
31
Marek Vasut58a7d1c2014-10-20 00:23:42 +020032static unsigned int mxs_i2c_get_bus_speed(struct i2c_adapter *adap)
Marek Vasut1fa96e82014-10-20 00:23:41 +020033{
Marek Vasut58a7d1c2014-10-20 00:23:42 +020034 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasut1fa96e82014-10-20 00:23:41 +020035 uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
36 uint32_t timing0;
37
38 timing0 = readl(&i2c_regs->hw_i2c_timing0);
39 /*
40 * This is a reverse version of the algorithm presented in
41 * i2c_set_bus_speed(). Please refer there for details.
42 */
43 return clk / ((((timing0 >> 16) - 3) * 2) + 38);
44}
45
Marek Vasut58a7d1c2014-10-20 00:23:42 +020046static uint mxs_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
Marek Vasutf4f680a2011-11-08 23:18:12 +000047{
Marek Vasut58a7d1c2014-10-20 00:23:42 +020048 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
49 /*
50 * The timing derivation algorithm. There is no documentation for this
51 * algorithm available, it was derived by using the scope and fiddling
52 * with constants until the result observed on the scope was good enough
53 * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be
54 * possible to assume the algorithm works for other frequencies as well.
55 *
56 * Note it was necessary to cap the frequency on both ends as it's not
57 * possible to configure completely arbitrary frequency for the I2C bus
58 * clock.
59 */
60 uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
61 uint32_t base = ((clk / speed) - 38) / 2;
62 uint16_t high_count = base + 3;
63 uint16_t low_count = base - 3;
64 uint16_t rcv_count = (high_count * 3) / 4;
65 uint16_t xmit_count = low_count / 4;
66
67 if (speed > 540000) {
68 printf("MXS I2C: Speed too high (%d Hz)\n", speed);
69 return -EINVAL;
70 }
71
72 if (speed < 12000) {
73 printf("MXS I2C: Speed too low (%d Hz)\n", speed);
74 return -EINVAL;
75 }
76
77 writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0);
78 writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1);
79
80 writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) |
81 (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET),
82 &i2c_regs->hw_i2c_timing2);
83
84 return 0;
85}
86
87static void mxs_i2c_reset(struct i2c_adapter *adap)
88{
89 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +000090 int ret;
Marek Vasut58a7d1c2014-10-20 00:23:42 +020091 int speed = mxs_i2c_get_bus_speed(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +000092
Otavio Salvadorfa7a51c2012-08-13 09:53:12 +000093 ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
Marek Vasutf4f680a2011-11-08 23:18:12 +000094 if (ret) {
95 debug("MXS I2C: Block reset timeout\n");
96 return;
97 }
98
99 writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ |
100 I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
101 I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ,
102 &i2c_regs->hw_i2c_ctrl1_clr);
103
104 writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set);
Marek Vasut1e2fc0d2012-11-30 18:17:06 +0000105
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200106 mxs_i2c_set_bus_speed(adap, speed);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000107}
108
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200109static void mxs_i2c_setup_read(struct i2c_adapter *adap, uint8_t chip, int len)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000110{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200111 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000112
113 writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
114 I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
115 (1 << I2C_QUEUECMD_XFER_COUNT_OFFSET),
116 &i2c_regs->hw_i2c_queuecmd);
117
118 writel((chip << 1) | 1, &i2c_regs->hw_i2c_data);
119
120 writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE |
121 (len << I2C_QUEUECMD_XFER_COUNT_OFFSET) |
122 I2C_QUEUECMD_POST_SEND_STOP, &i2c_regs->hw_i2c_queuecmd);
123
124 writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
125}
126
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200127static int mxs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
128 int alen, uchar *buf, int blen, int stop)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000129{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200130 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutd22643e2014-02-06 02:59:34 +0100131 uint32_t data, tmp;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000132 int i, remain, off;
Marek Vasutd22643e2014-02-06 02:59:34 +0100133 int timeout = MXS_I2C_MAX_TIMEOUT;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000134
135 if ((alen > 4) || (alen == 0)) {
136 debug("MXS I2C: Invalid address length\n");
Marek Vasutd22643e2014-02-06 02:59:34 +0100137 return -EINVAL;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000138 }
139
140 if (stop)
141 stop = I2C_QUEUECMD_POST_SEND_STOP;
142
143 writel(I2C_QUEUECMD_PRE_SEND_START |
144 I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
145 ((blen + alen + 1) << I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop,
146 &i2c_regs->hw_i2c_queuecmd);
147
148 data = (chip << 1) << 24;
149
150 for (i = 0; i < alen; i++) {
151 data >>= 8;
Torsten Fleischerfa86d1c2012-04-17 05:37:45 +0000152 data |= ((char *)&addr)[alen - i - 1] << 24;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000153 if ((i & 3) == 2)
154 writel(data, &i2c_regs->hw_i2c_data);
155 }
156
157 off = i;
158 for (; i < off + blen; i++) {
159 data >>= 8;
160 data |= buf[i - off] << 24;
161 if ((i & 3) == 2)
162 writel(data, &i2c_regs->hw_i2c_data);
163 }
164
165 remain = 24 - ((i & 3) * 8);
166 if (remain)
167 writel(data >> remain, &i2c_regs->hw_i2c_data);
168
169 writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
Marek Vasutd22643e2014-02-06 02:59:34 +0100170
171 while (--timeout) {
172 tmp = readl(&i2c_regs->hw_i2c_queuestat);
173 if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY)
174 break;
175 }
176
177 if (!timeout) {
178 debug("MXS I2C: Failed transmitting data!\n");
179 return -EINVAL;
180 }
181
182 return 0;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000183}
184
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200185static int mxs_i2c_wait_for_ack(struct i2c_adapter *adap)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000186{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200187 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000188 uint32_t tmp;
189 int timeout = MXS_I2C_MAX_TIMEOUT;
190
191 for (;;) {
192 tmp = readl(&i2c_regs->hw_i2c_ctrl1);
193 if (tmp & I2C_CTRL1_NO_SLAVE_ACK_IRQ) {
194 debug("MXS I2C: No slave ACK\n");
195 goto err;
196 }
197
198 if (tmp & (
199 I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
200 I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ)) {
201 debug("MXS I2C: Error (CTRL1 = %08x)\n", tmp);
202 goto err;
203 }
204
205 if (tmp & I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ)
206 break;
207
208 if (!timeout--) {
209 debug("MXS I2C: Operation timed out\n");
210 goto err;
211 }
212
213 udelay(1);
214 }
215
216 return 0;
217
218err:
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200219 mxs_i2c_reset(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000220 return 1;
221}
222
Marek Vasut1fa96e82014-10-20 00:23:41 +0200223static int mxs_i2c_if_read(struct i2c_adapter *adap, uint8_t chip,
224 uint addr, int alen, uint8_t *buffer,
225 int len)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000226{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200227 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000228 uint32_t tmp = 0;
Marek Vasut12491352013-11-04 14:29:12 +0100229 int timeout = MXS_I2C_MAX_TIMEOUT;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000230 int ret;
231 int i;
232
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200233 ret = mxs_i2c_write(adap, chip, addr, alen, NULL, 0, 0);
Marek Vasutd22643e2014-02-06 02:59:34 +0100234 if (ret) {
235 debug("MXS I2C: Failed writing address\n");
236 return ret;
237 }
238
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200239 ret = mxs_i2c_wait_for_ack(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000240 if (ret) {
241 debug("MXS I2C: Failed writing address\n");
242 return ret;
243 }
244
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200245 mxs_i2c_setup_read(adap, chip, len);
246 ret = mxs_i2c_wait_for_ack(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000247 if (ret) {
248 debug("MXS I2C: Failed reading address\n");
249 return ret;
250 }
251
252 for (i = 0; i < len; i++) {
253 if (!(i & 3)) {
Marek Vasut12491352013-11-04 14:29:12 +0100254 while (--timeout) {
255 tmp = readl(&i2c_regs->hw_i2c_queuestat);
256 if (!(tmp & I2C_QUEUESTAT_RD_QUEUE_EMPTY))
257 break;
258 }
259
260 if (!timeout) {
261 debug("MXS I2C: Failed receiving data!\n");
262 return -ETIMEDOUT;
263 }
264
Marek Vasutf4f680a2011-11-08 23:18:12 +0000265 tmp = readl(&i2c_regs->hw_i2c_queuedata);
266 }
267 buffer[i] = tmp & 0xff;
268 tmp >>= 8;
269 }
270
271 return 0;
272}
273
Marek Vasut1fa96e82014-10-20 00:23:41 +0200274static int mxs_i2c_if_write(struct i2c_adapter *adap, uint8_t chip,
275 uint addr, int alen, uint8_t *buffer,
276 int len)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000277{
278 int ret;
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200279 ret = mxs_i2c_write(adap, chip, addr, alen, buffer, len, 1);
Marek Vasutd22643e2014-02-06 02:59:34 +0100280 if (ret) {
281 debug("MXS I2C: Failed writing address\n");
282 return ret;
283 }
284
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200285 ret = mxs_i2c_wait_for_ack(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000286 if (ret)
287 debug("MXS I2C: Failed writing address\n");
288
289 return ret;
290}
291
Marek Vasut1fa96e82014-10-20 00:23:41 +0200292static int mxs_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000293{
294 int ret;
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200295 ret = mxs_i2c_write(adap, chip, 0, 1, NULL, 0, 1);
Marek Vasutd22643e2014-02-06 02:59:34 +0100296 if (!ret)
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200297 ret = mxs_i2c_wait_for_ack(adap);
298 mxs_i2c_reset(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000299 return ret;
300}
301
Marek Vasut1fa96e82014-10-20 00:23:41 +0200302static void mxs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000303{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200304 mxs_i2c_reset(adap);
305 mxs_i2c_set_bus_speed(adap, speed);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000306
307 return;
308}
Marek Vasut1fa96e82014-10-20 00:23:41 +0200309
310U_BOOT_I2C_ADAP_COMPLETE(mxs0, mxs_i2c_init, mxs_i2c_probe,
311 mxs_i2c_if_read, mxs_i2c_if_write,
312 mxs_i2c_set_bus_speed,
313 CONFIG_SYS_I2C_SPEED, 0, 0)