blob: 80ae6ec3a2e9478b57b547fb1a197a4a4051245a [file] [log] [blame]
Andy Yanbb38db02023-08-05 20:00:11 +08001CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_TEXT_BASE=0x00a00000
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
8CONFIG_NR_DRAM_BANKS=2
9CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
10CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
11CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2"
12CONFIG_ROCKCHIP_RK3568=y
13CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
14CONFIG_SPL_SERIAL=y
15CONFIG_SPL_STACK_R_ADDR=0x600000
16CONFIG_SPL_STACK=0x400000
17CONFIG_DEBUG_UART_BASE=0xFE660000
18CONFIG_DEBUG_UART_CLOCK=24000000
19CONFIG_SYS_LOAD_ADDR=0xc00800
20CONFIG_DEBUG_UART=y
21CONFIG_FIT=y
22CONFIG_FIT_VERBOSE=y
23CONFIG_SPL_FIT_SIGNATURE=y
24CONFIG_SPL_LOAD_FIT=y
25CONFIG_LEGACY_IMAGE_FORMAT=y
26CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-lubancat-2.dtb"
27# CONFIG_DISPLAY_CPUINFO is not set
28CONFIG_DISPLAY_BOARDINFO_LATE=y
29CONFIG_SPL_MAX_SIZE=0x40000
30CONFIG_SPL_PAD_TO=0x7f8000
31CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
32CONFIG_SPL_BSS_START_ADDR=0x4000000
33CONFIG_SPL_BSS_MAX_SIZE=0x4000
34# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
35# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
36CONFIG_SPL_STACK_R=y
37CONFIG_SPL_ATF=y
38CONFIG_CMD_GPIO=y
39CONFIG_CMD_GPT=y
40CONFIG_CMD_I2C=y
41CONFIG_CMD_MMC=y
42CONFIG_CMD_USB=y
43# CONFIG_CMD_SETEXPR is not set
44CONFIG_CMD_PMIC=y
45CONFIG_CMD_REGULATOR=y
46# CONFIG_SPL_DOS_PARTITION is not set
47CONFIG_SPL_OF_CONTROL=y
48CONFIG_OF_LIVE=y
49CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
50CONFIG_SPL_DM_SEQ_ALIAS=y
51CONFIG_SPL_REGMAP=y
52CONFIG_SPL_SYSCON=y
53CONFIG_SPL_CLK=y
54CONFIG_ROCKCHIP_GPIO=y
55CONFIG_SYS_I2C_ROCKCHIP=y
56CONFIG_MISC=y
57CONFIG_SUPPORT_EMMC_RPMB=y
58CONFIG_MMC_DW=y
59CONFIG_MMC_DW_ROCKCHIP=y
60CONFIG_MMC_SDHCI=y
61CONFIG_MMC_SDHCI_SDMA=y
62CONFIG_MMC_SDHCI_ROCKCHIP=y
63# CONFIG_SPI_FLASH is not set
Jonas Karlman25f56452023-10-01 19:17:21 +000064CONFIG_PHY_REALTEK=y
65CONFIG_DWC_ETH_QOS=y
66CONFIG_DWC_ETH_QOS_ROCKCHIP=y
Andy Yanbb38db02023-08-05 20:00:11 +080067CONFIG_PHY_ROCKCHIP_INNO_USB2=y
68CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
69CONFIG_SPL_PINCTRL=y
70CONFIG_DM_PMIC=y
71CONFIG_PMIC_RK8XX=y
72CONFIG_REGULATOR_RK8XX=y
73CONFIG_PWM_ROCKCHIP=y
74CONFIG_SPL_RAM=y
75CONFIG_BAUDRATE=1500000
76CONFIG_DEBUG_UART_SHIFT=2
77CONFIG_SYS_NS16550_MEM32=y
78CONFIG_SYSRESET=y
79CONFIG_USB=y
80CONFIG_USB_XHCI_HCD=y
81CONFIG_USB_EHCI_HCD=y
82CONFIG_USB_EHCI_GENERIC=y
83CONFIG_USB_OHCI_HCD=y
84CONFIG_USB_OHCI_GENERIC=y
85CONFIG_USB_DWC3=y
86CONFIG_USB_DWC3_GENERIC=y
87CONFIG_ERRNO_STR=y
88CONFIG_EFI_VAR_BUF_SIZE=16384