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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale IRQSTEER Interrupt Multiplexer
8
9maintainers:
10 - Lucas Stach <l.stach@pengutronix.de>
11
12properties:
13 compatible:
14 oneOf:
15 - const: fsl,imx-irqsteer
16 - items:
Tom Rini6b642ac2024-10-01 12:20:28 -060017 - enum:
18 - fsl,imx8m-irqsteer
19 - fsl,imx8mp-irqsteer
20 - fsl,imx8qxp-irqsteer
Tom Rini53633a82024-02-29 12:33:36 -050021 - const: fsl,imx-irqsteer
22
23 reg:
24 maxItems: 1
25
26 interrupts:
27 description: |
28 should contain the up to 8 parent interrupt lines used to multiplex
29 the input interrupts. They should be specified sequentially from
30 output 0 to 7.
31 items:
32 - description: output interrupt 0
33 - description: output interrupt 1
34 - description: output interrupt 2
35 - description: output interrupt 3
36 - description: output interrupt 4
37 - description: output interrupt 5
38 - description: output interrupt 6
39 - description: output interrupt 7
40 minItems: 1
41
42 clocks:
43 maxItems: 1
44
45 clock-names:
46 const: ipg
47
Tom Rini6b642ac2024-10-01 12:20:28 -060048 power-domains:
49 maxItems: 1
50
Tom Rini53633a82024-02-29 12:33:36 -050051 interrupt-controller: true
52
53 "#interrupt-cells":
54 const: 1
55
56 fsl,channel:
57 $ref: /schemas/types.yaml#/definitions/uint32
58 description: |
59 u32 value representing the output channel that all input IRQs should be
60 steered into.
61
62 fsl,num-irqs:
63 $ref: /schemas/types.yaml#/definitions/uint32
64 description: |
65 u32 value representing the number of input interrupts of this channel,
66 should be multiple of 32 input interrupts and up to 512 interrupts.
67
68required:
69 - compatible
70 - reg
71 - interrupts
72 - clocks
73 - clock-names
74 - interrupt-controller
75 - "#interrupt-cells"
76 - fsl,channel
77 - fsl,num-irqs
78
Tom Rini6b642ac2024-10-01 12:20:28 -060079allOf:
80 - if:
81 properties:
82 compatible:
83 contains:
84 enum:
85 - fsl,imx8mp-irqsteer
86 - fsl,imx8qxp-irqsteer
87 then:
88 required:
89 - power-domains
90 else:
91 properties:
92 power-domains: false
93
Tom Rini53633a82024-02-29 12:33:36 -050094additionalProperties: false
95
96examples:
97 - |
98 #include <dt-bindings/clock/imx8mq-clock.h>
99 #include <dt-bindings/interrupt-controller/arm-gic.h>
100
101 interrupt-controller@32e2d000 {
102 compatible = "fsl,imx-irqsteer";
103 reg = <0x32e2d000 0x1000>;
104 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
105 clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
106 clock-names = "ipg";
107 fsl,channel = <0>;
108 fsl,num-irqs = <64>;
109 interrupt-controller;
110 #interrupt-cells = <1>;
111 };