| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-isp.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Allwinner A31 Image Signal Processor Driver (ISP) |
| 8 | |
| 9 | maintainers: |
| 10 | - Paul Kocialkowski <paul.kocialkowski@bootlin.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | enum: |
| 15 | - allwinner,sun6i-a31-isp |
| 16 | - allwinner,sun8i-v3s-isp |
| 17 | |
| 18 | reg: |
| 19 | maxItems: 1 |
| 20 | |
| 21 | interrupts: |
| 22 | maxItems: 1 |
| 23 | |
| 24 | clocks: |
| 25 | items: |
| 26 | - description: Bus Clock |
| 27 | - description: Module Clock |
| 28 | - description: DRAM Clock |
| 29 | |
| 30 | clock-names: |
| 31 | items: |
| 32 | - const: bus |
| 33 | - const: mod |
| 34 | - const: ram |
| 35 | |
| 36 | resets: |
| 37 | maxItems: 1 |
| 38 | |
| 39 | ports: |
| 40 | $ref: /schemas/graph.yaml#/properties/ports |
| 41 | |
| 42 | properties: |
| 43 | port@0: |
| 44 | $ref: /schemas/graph.yaml#/properties/port |
| 45 | description: CSI0 input port |
| 46 | |
| 47 | port@1: |
| 48 | $ref: /schemas/graph.yaml#/properties/port |
| 49 | description: CSI1 input port |
| 50 | |
| 51 | if: |
| 52 | properties: |
| 53 | compatible: |
| 54 | contains: |
| 55 | enum: |
| 56 | - allwinner,sun8i-v3s-isp |
| 57 | then: |
| 58 | required: |
| 59 | - port@0 |
| 60 | |
| 61 | required: |
| 62 | - compatible |
| 63 | - reg |
| 64 | - interrupts |
| 65 | - clocks |
| 66 | - clock-names |
| 67 | - resets |
| 68 | |
| 69 | additionalProperties: false |
| 70 | |
| 71 | examples: |
| 72 | - | |
| 73 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 74 | #include <dt-bindings/clock/sun8i-v3s-ccu.h> |
| 75 | #include <dt-bindings/reset/sun8i-v3s-ccu.h> |
| 76 | |
| 77 | isp: isp@1cb8000 { |
| 78 | compatible = "allwinner,sun8i-v3s-isp"; |
| 79 | reg = <0x01cb8000 0x1000>; |
| 80 | interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; |
| 81 | clocks = <&ccu CLK_BUS_CSI>, |
| 82 | <&ccu CLK_CSI1_SCLK>, |
| 83 | <&ccu CLK_DRAM_CSI>; |
| 84 | clock-names = "bus", "mod", "ram"; |
| 85 | resets = <&ccu RST_BUS_CSI>; |
| 86 | |
| 87 | ports { |
| 88 | #address-cells = <1>; |
| 89 | #size-cells = <0>; |
| 90 | |
| 91 | port@0 { |
| 92 | reg = <0>; |
| 93 | |
| 94 | isp_in_csi0: endpoint { |
| 95 | remote-endpoint = <&csi0_out_isp>; |
| 96 | }; |
| 97 | }; |
| 98 | }; |
| 99 | }; |
| 100 | |
| 101 | ... |