blob: 04f566d2b0f423ccfc02ed6acf0e1ceded810fe7 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass6caa1952013-05-08 08:06:03 +00002/*
3 * Copyright (c) 2013, Google Inc.
4 *
5 * Copyright (C) 2011
6 * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
7 * - Added prep subcommand support
8 * - Reorganized source - modeled after powerpc version
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Marius Groeger <mgroeger@sysgo.de>
13 *
14 * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
Simon Glass6caa1952013-05-08 08:06:03 +000015 */
16
17#include <common.h>
18#include <fdt_support.h>
Tom Rini4588d612015-05-14 11:07:03 -040019#ifdef CONFIG_ARMV7_NONSEC
Jan Kiszkad6b72da2015-04-21 07:18:32 +020020#include <asm/armv7.h>
Tom Rini4588d612015-05-14 11:07:03 -040021#endif
Tom Rinidd09f7e2015-03-05 20:19:36 -050022#include <asm/psci.h>
Masahiro Yamada6b6024e2016-06-27 19:31:05 +090023#include <asm/spin_table.h>
Simon Glass6caa1952013-05-08 08:06:03 +000024
25DECLARE_GLOBAL_DATA_PTR;
26
Prabhakar Kushwaha6bedf442017-11-23 16:51:41 +053027#ifdef CONFIG_FMAN_ENET
28__weak int fdt_update_ethernet_dt(void *blob)
29{
30 return 0;
31}
32#endif
33
Ma Haijune29607e2014-07-12 14:24:06 +010034int arch_fixup_fdt(void *blob)
Simon Glass6caa1952013-05-08 08:06:03 +000035{
Heiko Schocher020da842018-01-17 07:00:37 +010036 __maybe_unused int ret = 0;
B, Ravi984a3c82017-04-18 17:27:26 +053037#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
Simon Glass6caa1952013-05-08 08:06:03 +000038 bd_t *bd = gd->bd;
B, Ravi984a3c82017-04-18 17:27:26 +053039 int bank;
Simon Glass6caa1952013-05-08 08:06:03 +000040 u64 start[CONFIG_NR_DRAM_BANKS];
41 u64 size[CONFIG_NR_DRAM_BANKS];
42
43 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
44 start[bank] = bd->bi_dram[bank].start;
45 size[bank] = bd->bi_dram[bank].size;
Jan Kiszkad6b72da2015-04-21 07:18:32 +020046#ifdef CONFIG_ARMV7_NONSEC
47 ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
48 if (ret)
49 return ret;
50#endif
Simon Glass6caa1952013-05-08 08:06:03 +000051 }
52
B, Ravi984a3c82017-04-18 17:27:26 +053053#ifdef CONFIG_OF_LIBFDT
Marc Zyngiere771a3d2014-07-12 14:24:07 +010054 ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
Marc Zyngiere771a3d2014-07-12 14:24:07 +010055 if (ret)
56 return ret;
B, Ravi984a3c82017-04-18 17:27:26 +053057#endif
Marc Zyngiere771a3d2014-07-12 14:24:07 +010058
Masahiro Yamada6b6024e2016-06-27 19:31:05 +090059#ifdef CONFIG_ARMV8_SPIN_TABLE
60 ret = spin_table_update_dt(blob);
61 if (ret)
62 return ret;
63#endif
64
macro.wave.z@gmail.com9a561752016-12-08 11:58:25 +080065#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI) || \
Hou Zhiqiangdaa92642017-01-16 17:31:48 +080066 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
Tom Rinidd09f7e2015-03-05 20:19:36 -050067 ret = psci_update_dt(blob);
Masahiro Yamada6441e3d2016-06-17 21:51:48 +090068 if (ret)
69 return ret;
Marc Zyngiere771a3d2014-07-12 14:24:07 +010070#endif
B, Ravi984a3c82017-04-18 17:27:26 +053071#endif
Masahiro Yamada6441e3d2016-06-17 21:51:48 +090072
Prabhakar Kushwaha6bedf442017-11-23 16:51:41 +053073#ifdef CONFIG_FMAN_ENET
74 ret = fdt_update_ethernet_dt(blob);
75 if (ret)
76 return ret;
77#endif
Masahiro Yamada6441e3d2016-06-17 21:51:48 +090078 return 0;
Simon Glass6caa1952013-05-08 08:06:03 +000079}