Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Rockchip Electronics Co., Ltd |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <clk.h> |
| 8 | #include <dm.h> |
| 9 | #include <ram.h> |
Simon Glass | c35f8e5 | 2019-01-21 14:53:31 -0700 | [diff] [blame] | 10 | #include <asm/gpio.h> |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 11 | #include <asm/io.h> |
Kever Yang | 15f09a1 | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 12 | #include <asm/arch-rockchip/clock.h> |
| 13 | #include <asm/arch-rockchip/periph.h> |
| 14 | #include <asm/arch-rockchip/grf_rk3036.h> |
| 15 | #include <asm/arch-rockchip/boot_mode.h> |
| 16 | #include <asm/arch-rockchip/sdram_rk3036.h> |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 17 | #include <dm/pinctrl.h> |
| 18 | |
| 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
Jacob Chen | 67171e1 | 2016-09-19 18:46:28 +0800 | [diff] [blame] | 21 | __weak int rk_board_late_init(void) |
| 22 | { |
| 23 | return 0; |
| 24 | } |
| 25 | |
| 26 | int board_late_init(void) |
| 27 | { |
| 28 | setup_boot_mode(); |
| 29 | |
| 30 | return rk_board_late_init(); |
| 31 | } |
| 32 | |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 33 | int board_init(void) |
| 34 | { |
| 35 | return 0; |
| 36 | } |
| 37 | |
Kever Yang | 7805cdf | 2017-06-23 16:11:06 +0800 | [diff] [blame] | 38 | #if !CONFIG_IS_ENABLED(RAM) |
| 39 | /* |
| 40 | * When CONFIG_RAM is enabled, the dram_init() function is implemented |
| 41 | * in sdram_common.c. |
| 42 | */ |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 43 | int dram_init(void) |
| 44 | { |
| 45 | gd->ram_size = sdram_size(); |
| 46 | |
| 47 | return 0; |
| 48 | } |
Kever Yang | 7805cdf | 2017-06-23 16:11:06 +0800 | [diff] [blame] | 49 | #endif |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 50 | |
Trevor Woerner | 1001502 | 2019-05-03 09:41:00 -0400 | [diff] [blame] | 51 | #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) |
Jacob Chen | f48f2b7 | 2016-09-19 18:46:27 +0800 | [diff] [blame] | 52 | void enable_caches(void) |
| 53 | { |
| 54 | /* Enable D-cache. I-cache is already enabled in start.S */ |
| 55 | dcache_enable(); |
| 56 | } |
| 57 | #endif |
| 58 | |
| 59 | #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) |
| 60 | #include <usb.h> |
| 61 | #include <usb/dwc2_udc.h> |
| 62 | |
| 63 | static struct dwc2_plat_otg_data rk3036_otg_data = { |
| 64 | .rx_fifo_sz = 512, |
| 65 | .np_tx_fifo_sz = 16, |
| 66 | .tx_fifo_sz = 128, |
| 67 | }; |
| 68 | |
| 69 | int board_usb_init(int index, enum usb_init_type init) |
| 70 | { |
| 71 | int node; |
| 72 | const char *mode; |
| 73 | bool matched = false; |
| 74 | const void *blob = gd->fdt_blob; |
| 75 | |
| 76 | /* find the usb_otg node */ |
| 77 | node = fdt_node_offset_by_compatible(blob, -1, |
| 78 | "rockchip,rk3288-usb"); |
| 79 | |
| 80 | while (node > 0) { |
| 81 | mode = fdt_getprop(blob, node, "dr_mode", NULL); |
| 82 | if (mode && strcmp(mode, "otg") == 0) { |
| 83 | matched = true; |
| 84 | break; |
| 85 | } |
| 86 | |
| 87 | node = fdt_node_offset_by_compatible(blob, node, |
| 88 | "rockchip,rk3288-usb"); |
| 89 | } |
| 90 | if (!matched) { |
| 91 | debug("Not found usb_otg device\n"); |
| 92 | return -ENODEV; |
| 93 | } |
| 94 | rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); |
| 95 | |
| 96 | return dwc2_udc_probe(&rk3036_otg_data); |
| 97 | } |
| 98 | |
| 99 | int board_usb_cleanup(int index, enum usb_init_type init) |
| 100 | { |
| 101 | return 0; |
| 102 | } |
| 103 | #endif |