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Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +05301/*
2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra76x.dtsi"
11#include "dra7-evm-common.dtsi"
Jean-Jacques Hiblota7b704a2018-02-27 17:05:48 +010012#include "dra76x-mmc-iodelay.dtsi"
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053013#include <dt-bindings/net/ti-dp83867.h>
14
15/ {
16 model = "TI DRA762 EVM";
17 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x80000000 0x0 0x80000000>;
22 };
23
24 vsys_12v0: fixedregulator-vsys12v0 {
25 /* main supply */
26 compatible = "regulator-fixed";
27 regulator-name = "vsys_12v0";
28 regulator-min-microvolt = <12000000>;
29 regulator-max-microvolt = <12000000>;
30 regulator-always-on;
31 regulator-boot-on;
32 };
33
34 vsys_5v0: fixedregulator-vsys5v0 {
35 /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */
36 compatible = "regulator-fixed";
37 regulator-name = "vsys_5v0";
38 regulator-min-microvolt = <5000000>;
39 regulator-max-microvolt = <5000000>;
40 vin-supply = <&vsys_12v0>;
41 regulator-always-on;
42 regulator-boot-on;
43 };
44
45 vsys_3v3: fixedregulator-vsys3v3 {
46 /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
47 compatible = "regulator-fixed";
48 regulator-name = "vsys_3v3";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 vin-supply = <&vsys_12v0>;
52 regulator-always-on;
53 regulator-boot-on;
54 };
55
56 vio_3v3: fixedregulator-vio_3v3 {
57 compatible = "regulator-fixed";
58 regulator-name = "vio_3v3";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 vin-supply = <&vsys_3v3>;
62 regulator-always-on;
63 regulator-boot-on;
64 };
65
66 vio_3v3_sd: fixedregulator-sd {
67 compatible = "regulator-fixed";
68 regulator-name = "vio_3v3_sd";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
71 vin-supply = <&vio_3v3>;
72 enable-active-high;
73 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
74 };
75
76 vio_1v8: fixedregulator-vio_1v8 {
77 compatible = "regulator-fixed";
78 regulator-name = "vio_1v8";
79 regulator-min-microvolt = <1800000>;
80 regulator-max-microvolt = <1800000>;
81 vin-supply = <&smps5_reg>;
82 };
83
84 vtt_fixed: fixedregulator-vtt {
85 compatible = "regulator-fixed";
86 regulator-name = "vtt_fixed";
87 regulator-min-microvolt = <1350000>;
88 regulator-max-microvolt = <1350000>;
89 vin-supply = <&vsys_3v3>;
90 regulator-always-on;
91 regulator-boot-on;
92 };
93
94 aic_dvdd: fixedregulator-aic_dvdd {
95 /* TPS77018DBVT */
96 compatible = "regulator-fixed";
97 regulator-name = "aic_dvdd";
98 vin-supply = <&vio_3v3>;
99 regulator-min-microvolt = <1800000>;
100 regulator-max-microvolt = <1800000>;
101 };
102};
103
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530104&i2c1 {
105 status = "okay";
106 clock-frequency = <400000>;
107
108 tps65917: tps65917@58 {
109 compatible = "ti,tps65917";
110 reg = <0x58>;
111 ti,system-power-controller;
112 interrupt-controller;
113 #interrupt-cells = <2>;
114
115 tps65917_pmic {
116 compatible = "ti,tps65917-pmic";
117
118 smps12-in-supply = <&vsys_3v3>;
119 smps3-in-supply = <&vsys_3v3>;
120 smps4-in-supply = <&vsys_3v3>;
121 smps5-in-supply = <&vsys_3v3>;
122 ldo1-in-supply = <&vsys_3v3>;
123 ldo2-in-supply = <&vsys_3v3>;
124 ldo3-in-supply = <&vsys_5v0>;
125 ldo4-in-supply = <&vsys_5v0>;
126 ldo5-in-supply = <&vsys_3v3>;
127
128 tps65917_regulators: regulators {
129 smps12_reg: smps12 {
130 /* VDD_DSPEVE */
131 regulator-name = "smps12";
132 regulator-min-microvolt = <850000>;
133 regulator-max-microvolt = <1250000>;
134 regulator-always-on;
135 regulator-boot-on;
136 };
137
138 smps3_reg: smps3 {
139 /* VDD_CORE */
140 regulator-name = "smps3";
141 regulator-min-microvolt = <850000>;
142 regulator-max-microvolt = <1250000>;
143 regulator-boot-on;
144 regulator-always-on;
145 };
146
147 smps4_reg: smps4 {
148 /* VDD_IVA */
149 regulator-name = "smps4";
150 regulator-min-microvolt = <850000>;
151 regulator-max-microvolt = <1250000>;
152 regulator-always-on;
153 regulator-boot-on;
154 };
155
156 smps5_reg: smps5 {
157 /* VDDS1V8 */
158 regulator-name = "smps5";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
161 regulator-boot-on;
162 regulator-always-on;
163 };
164
165 ldo1_reg: ldo1 {
166 /* LDO1_OUT --> VDA_PHY1_1V8 */
167 regulator-name = "ldo1";
168 regulator-min-microvolt = <1800000>;
169 regulator-max-microvolt = <1800000>;
170 regulator-always-on;
171 regulator-boot-on;
172 regulator-allow-bypass;
173 };
174
175 ldo2_reg: ldo2 {
176 /* LDO2_OUT --> VDA_PHY2_1V8 */
177 regulator-name = "ldo2";
178 regulator-min-microvolt = <1800000>;
179 regulator-max-microvolt = <1800000>;
180 regulator-allow-bypass;
181 regulator-always-on;
182 };
183
184 ldo3_reg: ldo3 {
185 /* VDA_USB_3V3 */
186 regulator-name = "ldo3";
187 regulator-min-microvolt = <3300000>;
188 regulator-max-microvolt = <3300000>;
189 regulator-boot-on;
190 regulator-always-on;
191 };
192
193 ldo5_reg: ldo5 {
194 /* VDDA_1V8_PLL */
195 regulator-name = "ldo5";
196 regulator-min-microvolt = <1800000>;
197 regulator-max-microvolt = <1800000>;
198 regulator-always-on;
199 regulator-boot-on;
200 };
201
202 ldo4_reg: ldo4 {
203 /* VDD_SDIO_DV */
204 regulator-name = "ldo4";
205 regulator-min-microvolt = <1800000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-boot-on;
208 regulator-always-on;
209 };
210 };
211 };
212
213 tps65917_power_button {
214 compatible = "ti,palmas-pwrbutton";
215 interrupt-parent = <&tps65917>;
216 interrupts = <1 IRQ_TYPE_NONE>;
217 wakeup-source;
218 ti,palmas-long-press-seconds = <6>;
219 };
220 };
221
222 lp87565: lp87565@60 {
223 compatible = "ti,lp87565-q1";
224 reg = <0x60>;
225
226 buck10-in-supply =<&vsys_3v3>;
227 buck23-in-supply =<&vsys_3v3>;
228
229 regulators: regulators {
230 buck10_reg: buck10 {
231 /*VDD_MPU*/
232 regulator-name = "buck10";
233 regulator-min-microvolt = <850000>;
234 regulator-max-microvolt = <1250000>;
235 regulator-always-on;
236 regulator-boot-on;
237 };
238
239 buck23_reg: buck23 {
240 /* VDD_GPU*/
241 regulator-name = "buck23";
242 regulator-min-microvolt = <850000>;
243 regulator-max-microvolt = <1250000>;
244 regulator-boot-on;
245 regulator-always-on;
246 };
247 };
248 };
249
250 pcf_lcd: pcf8757@20 {
251 compatible = "ti,pcf8575", "nxp,pcf8575";
252 reg = <0x20>;
253 gpio-controller;
254 #gpio-cells = <2>;
255 interrupt-controller;
256 #interrupt-cells = <2>;
257 interrupt-parent = <&gpio1>;
258 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
259 };
260
261 pcf_gpio_21: pcf8757@21 {
262 compatible = "ti,pcf8575", "nxp,pcf8575";
263 reg = <0x21>;
264 gpio-controller;
265 #gpio-cells = <2>;
266 interrupt-parent = <&gpio1>;
267 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
268 interrupt-controller;
269 #interrupt-cells = <2>;
270 };
271
272 pcf_hdmi: pcf8575@26 {
273 compatible = "ti,pcf8575", "nxp,pcf8575";
274 reg = <0x26>;
275 gpio-controller;
276 #gpio-cells = <2>;
277 p1 {
278 /* vin6_sel_s0: high: VIN6, low: audio */
279 gpio-hog;
280 gpios = <1 GPIO_ACTIVE_HIGH>;
281 output-low;
282 line-name = "vin6_sel_s0";
283 };
284 };
285
286 tlv320aic3106: tlv320aic3106@19 {
287 #sound-dai-cells = <0>;
288 compatible = "ti,tlv320aic3106";
289 reg = <0x19>;
290 adc-settle-ms = <40>;
291 ai3x-micbias-vg = <1>; /* 2.0V */
292 status = "okay";
293
294 /* Regulators */
295 AVDD-supply = <&vio_3v3>;
296 IOVDD-supply = <&vio_3v3>;
297 DRVDD-supply = <&vio_3v3>;
298 DVDD-supply = <&aic_dvdd>;
299 };
300};
301
302&cpu0 {
303 vdd-supply = <&buck10_reg>;
304};
305
306&mmc1 {
307 status = "okay";
308 vmmc-supply = <&vio_3v3_sd>;
Jean-Jacques Hiblota7b704a2018-02-27 17:05:48 +0100309 vqmmc-supply = <&ldo4_reg>;
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530310 bus-width = <4>;
311 /*
312 * SDCD signal is not being used here - using the fact that GPIO mode
313 * is always hardwired.
314 */
315 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
Jean-Jacques Hiblota7b704a2018-02-27 17:05:48 +0100316 pinctrl-names = "default", "hs";
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530317 pinctrl-0 = <&mmc1_pins_default>;
Jean-Jacques Hiblota7b704a2018-02-27 17:05:48 +0100318 pinctrl-1 = <&mmc1_pins_hs>;
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530319};
320
321&mmc2 {
322 status = "okay";
323 vmmc-supply = <&vio_1v8>;
324 bus-width = <8>;
Jean-Jacques Hiblota7b704a2018-02-27 17:05:48 +0100325 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530326 pinctrl-0 = <&mmc2_pins_default>;
Jean-Jacques Hiblota7b704a2018-02-27 17:05:48 +0100327 pinctrl-1 = <&mmc2_pins_default>;
328 pinctrl-2 = <&mmc2_pins_default>;
329 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530330};
331
332/* No RTC on this device */
333&rtc {
334 status = "disabled";
335};
336
337&mac {
338 status = "okay";
339
340 dual_emac;
341};
342
343&cpsw_emac0 {
Grygorii Strashko68d875d2019-08-31 10:30:32 +0300344 phy-handle = <&dp83867_0>;
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530345 phy-mode = "rgmii-id";
346 dual_emac_res_vlan = <1>;
347};
348
349&cpsw_emac1 {
Grygorii Strashko68d875d2019-08-31 10:30:32 +0300350 phy-handle = <&dp83867_1>;
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +0530351 phy-mode = "rgmii-id";
352 dual_emac_res_vlan = <2>;
353};
354
355&davinci_mdio {
356 dp83867_0: ethernet-phy@2 {
357 reg = <2>;
358 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
359 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
360 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
361 ti,min-output-impedance;
362 ti,dp83867-rxctrl-strap-quirk;
363 };
364
365 dp83867_1: ethernet-phy@3 {
366 reg = <3>;
367 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
368 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
369 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
370 ti,min-output-impedance;
371 ti,dp83867-rxctrl-strap-quirk;
372 };
373};
374
375&usb2_phy1 {
376 phy-supply = <&ldo3_reg>;
377};
378
379&usb2_phy2 {
380 phy-supply = <&ldo3_reg>;
381};
382
383&qspi {
384 spi-max-frequency = <96000000>;
385 m25p80@0 {
386 spi-max-frequency = <96000000>;
387 };
388};