Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 2 | /* |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 3 | * Copyright (c) 2018 Collabora Ltd. |
| 4 | * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 5 | * Copyright (c) 2018 Linaro Ltd. |
| 6 | */ |
| 7 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 8 | #include "rk3399.dtsi" |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 9 | #include "rk3399-opp.dtsi" |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 10 | |
| 11 | / { |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 12 | sdio_pwrseq: sdio-pwrseq { |
| 13 | compatible = "mmc-pwrseq-simple"; |
| 14 | clocks = <&rk808 1>; |
| 15 | clock-names = "ext_clock"; |
| 16 | pinctrl-names = "default"; |
| 17 | pinctrl-0 = <&wifi_enable_h>; |
| 18 | reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; |
| 19 | }; |
| 20 | |
| 21 | vcc12v_dcin: vcc12v-dcin { |
| 22 | compatible = "regulator-fixed"; |
| 23 | regulator-name = "vcc12v_dcin"; |
| 24 | regulator-min-microvolt = <12000000>; |
| 25 | regulator-max-microvolt = <12000000>; |
| 26 | regulator-always-on; |
| 27 | regulator-boot-on; |
| 28 | }; |
| 29 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 30 | vcc1v8_s0: vcc1v8-s0 { |
| 31 | compatible = "regulator-fixed"; |
| 32 | regulator-name = "vcc1v8_s0"; |
| 33 | regulator-min-microvolt = <1800000>; |
| 34 | regulator-max-microvolt = <1800000>; |
| 35 | regulator-always-on; |
| 36 | }; |
| 37 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 38 | vcc5v0_sys: vcc5v0-sys { |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 39 | compatible = "regulator-fixed"; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 40 | regulator-name = "vcc5v0_sys"; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 41 | regulator-min-microvolt = <5000000>; |
| 42 | regulator-max-microvolt = <5000000>; |
| 43 | regulator-always-on; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 44 | vin-supply = <&vcc12v_dcin>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 45 | }; |
| 46 | |
| 47 | vcc3v3_sys: vcc3v3-sys { |
| 48 | compatible = "regulator-fixed"; |
| 49 | regulator-name = "vcc3v3_sys"; |
| 50 | regulator-min-microvolt = <3300000>; |
| 51 | regulator-max-microvolt = <3300000>; |
| 52 | regulator-always-on; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 53 | vin-supply = <&vcc5v0_sys>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 54 | }; |
| 55 | |
| 56 | vcc3v3_pcie: vcc3v3-pcie-regulator { |
| 57 | compatible = "regulator-fixed"; |
| 58 | enable-active-high; |
| 59 | pinctrl-names = "default"; |
| 60 | pinctrl-0 = <&pcie_drv>; |
| 61 | regulator-boot-on; |
| 62 | regulator-name = "vcc3v3_pcie"; |
| 63 | regulator-min-microvolt = <3300000>; |
| 64 | regulator-max-microvolt = <3300000>; |
| 65 | vin-supply = <&vcc3v3_sys>; |
| 66 | }; |
| 67 | |
| 68 | vcc5v0_host: vcc5v0-host-regulator { |
| 69 | compatible = "regulator-fixed"; |
| 70 | enable-active-high; |
| 71 | pinctrl-names = "default"; |
| 72 | pinctrl-0 = <&host_vbus_drv>; |
| 73 | regulator-name = "vcc5v0_host"; |
| 74 | regulator-min-microvolt = <5000000>; |
| 75 | regulator-max-microvolt = <5000000>; |
| 76 | regulator-always-on; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 77 | vin-supply = <&vcc5v0_sys>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 78 | }; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 79 | }; |
| 80 | |
| 81 | &cpu_l0 { |
| 82 | cpu-supply = <&vdd_cpu_l>; |
| 83 | }; |
| 84 | |
| 85 | &cpu_l1 { |
| 86 | cpu-supply = <&vdd_cpu_l>; |
| 87 | }; |
| 88 | |
| 89 | &cpu_l2 { |
| 90 | cpu-supply = <&vdd_cpu_l>; |
| 91 | }; |
| 92 | |
| 93 | &cpu_l3 { |
| 94 | cpu-supply = <&vdd_cpu_l>; |
| 95 | }; |
| 96 | |
| 97 | &cpu_b0 { |
| 98 | cpu-supply = <&vdd_cpu_b>; |
| 99 | }; |
| 100 | |
| 101 | &cpu_b1 { |
| 102 | cpu-supply = <&vdd_cpu_b>; |
| 103 | }; |
| 104 | |
| 105 | &emmc_phy { |
| 106 | status = "okay"; |
| 107 | }; |
| 108 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 109 | &gpu { |
| 110 | mali-supply = <&vdd_gpu>; |
| 111 | status = "okay"; |
| 112 | }; |
| 113 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 114 | &hdmi { |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 115 | ddc-i2c-bus = <&i2c3>; |
| 116 | pinctrl-names = "default"; |
| 117 | pinctrl-0 = <&hdmi_cec>; |
| 118 | status = "okay"; |
| 119 | }; |
| 120 | |
| 121 | &hdmi_sound { |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 122 | status = "okay"; |
| 123 | }; |
| 124 | |
| 125 | &i2c0 { |
| 126 | clock-frequency = <400000>; |
| 127 | i2c-scl-rising-time-ns = <168>; |
| 128 | i2c-scl-falling-time-ns = <4>; |
| 129 | status = "okay"; |
| 130 | |
| 131 | vdd_cpu_b: regulator@40 { |
| 132 | compatible = "silergy,syr827"; |
| 133 | reg = <0x40>; |
| 134 | fcs,suspend-voltage-selector = <1>; |
| 135 | regulator-name = "vdd_cpu_b"; |
| 136 | regulator-min-microvolt = <712500>; |
| 137 | regulator-max-microvolt = <1500000>; |
| 138 | regulator-ramp-delay = <1000>; |
| 139 | regulator-always-on; |
| 140 | regulator-boot-on; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 141 | vin-supply = <&vcc5v0_sys>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 142 | status = "okay"; |
| 143 | |
| 144 | regulator-state-mem { |
| 145 | regulator-off-in-suspend; |
| 146 | }; |
| 147 | }; |
| 148 | |
| 149 | vdd_gpu: regulator@41 { |
| 150 | compatible = "silergy,syr828"; |
| 151 | reg = <0x41>; |
| 152 | fcs,suspend-voltage-selector = <1>; |
| 153 | regulator-name = "vdd_gpu"; |
| 154 | regulator-min-microvolt = <712500>; |
| 155 | regulator-max-microvolt = <1500000>; |
| 156 | regulator-ramp-delay = <1000>; |
| 157 | regulator-always-on; |
| 158 | regulator-boot-on; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 159 | vin-supply = <&vcc5v0_sys>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 160 | regulator-state-mem { |
| 161 | regulator-off-in-suspend; |
| 162 | }; |
| 163 | }; |
| 164 | |
| 165 | rk808: pmic@1b { |
| 166 | compatible = "rockchip,rk808"; |
| 167 | reg = <0x1b>; |
| 168 | interrupt-parent = <&gpio1>; |
| 169 | interrupts = <21 IRQ_TYPE_LEVEL_LOW>; |
| 170 | pinctrl-names = "default"; |
| 171 | pinctrl-0 = <&pmic_int_l>; |
| 172 | rockchip,system-power-controller; |
| 173 | wakeup-source; |
| 174 | #clock-cells = <1>; |
| 175 | clock-output-names = "xin32k", "rk808-clkout2"; |
| 176 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 177 | vcc1-supply = <&vcc5v0_sys>; |
| 178 | vcc2-supply = <&vcc5v0_sys>; |
| 179 | vcc3-supply = <&vcc5v0_sys>; |
| 180 | vcc4-supply = <&vcc5v0_sys>; |
| 181 | vcc6-supply = <&vcc5v0_sys>; |
| 182 | vcc7-supply = <&vcc5v0_sys>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 183 | vcc8-supply = <&vcc3v3_sys>; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 184 | vcc9-supply = <&vcc5v0_sys>; |
| 185 | vcc10-supply = <&vcc5v0_sys>; |
| 186 | vcc11-supply = <&vcc5v0_sys>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 187 | vcc12-supply = <&vcc3v3_sys>; |
| 188 | vddio-supply = <&vcc_1v8>; |
| 189 | |
| 190 | regulators { |
| 191 | vdd_center: DCDC_REG1 { |
| 192 | regulator-name = "vdd_center"; |
| 193 | regulator-min-microvolt = <750000>; |
| 194 | regulator-max-microvolt = <1350000>; |
| 195 | regulator-always-on; |
| 196 | regulator-boot-on; |
| 197 | regulator-state-mem { |
| 198 | regulator-off-in-suspend; |
| 199 | }; |
| 200 | }; |
| 201 | |
| 202 | vdd_cpu_l: DCDC_REG2 { |
| 203 | regulator-name = "vdd_cpu_l"; |
| 204 | regulator-min-microvolt = <750000>; |
| 205 | regulator-max-microvolt = <1350000>; |
| 206 | regulator-always-on; |
| 207 | regulator-boot-on; |
| 208 | regulator-state-mem { |
| 209 | regulator-off-in-suspend; |
| 210 | }; |
| 211 | }; |
| 212 | |
| 213 | vcc_ddr: DCDC_REG3 { |
| 214 | regulator-name = "vcc_ddr"; |
| 215 | regulator-always-on; |
| 216 | regulator-boot-on; |
| 217 | regulator-state-mem { |
| 218 | regulator-on-in-suspend; |
| 219 | }; |
| 220 | }; |
| 221 | |
| 222 | vcc_1v8: DCDC_REG4 { |
| 223 | regulator-name = "vcc_1v8"; |
| 224 | regulator-min-microvolt = <1800000>; |
| 225 | regulator-max-microvolt = <1800000>; |
| 226 | regulator-always-on; |
| 227 | regulator-boot-on; |
| 228 | regulator-state-mem { |
| 229 | regulator-on-in-suspend; |
| 230 | regulator-suspend-microvolt = <1800000>; |
| 231 | }; |
| 232 | }; |
| 233 | |
| 234 | vcc1v8_dvp: LDO_REG1 { |
| 235 | regulator-name = "vcc1v8_dvp"; |
| 236 | regulator-min-microvolt = <1800000>; |
| 237 | regulator-max-microvolt = <1800000>; |
| 238 | regulator-always-on; |
| 239 | regulator-boot-on; |
| 240 | regulator-state-mem { |
| 241 | regulator-on-in-suspend; |
| 242 | regulator-suspend-microvolt = <1800000>; |
| 243 | }; |
| 244 | }; |
| 245 | |
| 246 | vcca1v8_hdmi: LDO_REG2 { |
| 247 | regulator-name = "vcca1v8_hdmi"; |
| 248 | regulator-min-microvolt = <1800000>; |
| 249 | regulator-max-microvolt = <1800000>; |
| 250 | regulator-always-on; |
| 251 | regulator-boot-on; |
| 252 | regulator-state-mem { |
| 253 | regulator-on-in-suspend; |
| 254 | regulator-suspend-microvolt = <1800000>; |
| 255 | }; |
| 256 | }; |
| 257 | |
| 258 | vcca_1v8: LDO_REG3 { |
| 259 | regulator-name = "vcca_1v8"; |
| 260 | regulator-min-microvolt = <1800000>; |
| 261 | regulator-max-microvolt = <1800000>; |
| 262 | regulator-always-on; |
| 263 | regulator-boot-on; |
| 264 | regulator-state-mem { |
| 265 | regulator-on-in-suspend; |
| 266 | regulator-suspend-microvolt = <1800000>; |
| 267 | }; |
| 268 | }; |
| 269 | |
| 270 | vcc_sd: LDO_REG4 { |
| 271 | regulator-name = "vcc_sd"; |
| 272 | regulator-min-microvolt = <1800000>; |
| 273 | regulator-max-microvolt = <3300000>; |
| 274 | regulator-always-on; |
| 275 | regulator-boot-on; |
| 276 | regulator-state-mem { |
| 277 | regulator-on-in-suspend; |
| 278 | regulator-suspend-microvolt = <3300000>; |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | vcc3v0_sd: LDO_REG5 { |
| 283 | regulator-name = "vcc3v0_sd"; |
| 284 | regulator-min-microvolt = <3000000>; |
| 285 | regulator-max-microvolt = <3000000>; |
| 286 | regulator-always-on; |
| 287 | regulator-boot-on; |
| 288 | regulator-state-mem { |
| 289 | regulator-on-in-suspend; |
| 290 | regulator-suspend-microvolt = <3000000>; |
| 291 | }; |
| 292 | }; |
| 293 | |
| 294 | vcc_1v5: LDO_REG6 { |
| 295 | regulator-name = "vcc_1v5"; |
| 296 | regulator-min-microvolt = <1500000>; |
| 297 | regulator-max-microvolt = <1500000>; |
| 298 | regulator-always-on; |
| 299 | regulator-boot-on; |
| 300 | regulator-state-mem { |
| 301 | regulator-on-in-suspend; |
| 302 | regulator-suspend-microvolt = <1500000>; |
| 303 | }; |
| 304 | }; |
| 305 | |
| 306 | vcca0v9_hdmi: LDO_REG7 { |
| 307 | regulator-name = "vcca0v9_hdmi"; |
| 308 | regulator-min-microvolt = <900000>; |
| 309 | regulator-max-microvolt = <900000>; |
| 310 | regulator-always-on; |
| 311 | regulator-boot-on; |
| 312 | regulator-state-mem { |
| 313 | regulator-on-in-suspend; |
| 314 | regulator-suspend-microvolt = <900000>; |
| 315 | }; |
| 316 | }; |
| 317 | |
| 318 | vcc_3v0: LDO_REG8 { |
| 319 | regulator-name = "vcc_3v0"; |
| 320 | regulator-min-microvolt = <3000000>; |
| 321 | regulator-max-microvolt = <3000000>; |
| 322 | regulator-always-on; |
| 323 | regulator-boot-on; |
| 324 | regulator-state-mem { |
| 325 | regulator-on-in-suspend; |
| 326 | regulator-suspend-microvolt = <3000000>; |
| 327 | }; |
| 328 | }; |
| 329 | |
| 330 | vcc3v3_s3: SWITCH_REG1 { |
| 331 | regulator-name = "vcc3v3_s3"; |
| 332 | regulator-always-on; |
| 333 | regulator-boot-on; |
| 334 | regulator-state-mem { |
| 335 | regulator-on-in-suspend; |
| 336 | }; |
| 337 | }; |
| 338 | |
| 339 | vcc3v3_s0: SWITCH_REG2 { |
| 340 | regulator-name = "vcc3v3_s0"; |
| 341 | regulator-always-on; |
| 342 | regulator-boot-on; |
| 343 | regulator-state-mem { |
| 344 | regulator-on-in-suspend; |
| 345 | }; |
| 346 | }; |
| 347 | }; |
| 348 | }; |
| 349 | }; |
| 350 | |
| 351 | &i2c1 { |
| 352 | status = "okay"; |
| 353 | }; |
| 354 | |
| 355 | &i2c2 { |
| 356 | status = "okay"; |
| 357 | }; |
| 358 | |
| 359 | &i2c3 { |
| 360 | status = "okay"; |
| 361 | }; |
| 362 | |
| 363 | &i2c4 { |
| 364 | status = "okay"; |
| 365 | }; |
| 366 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 367 | &i2s2 { |
| 368 | status = "okay"; |
| 369 | }; |
| 370 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 371 | &io_domains { |
| 372 | bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ |
| 373 | audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ |
| 374 | sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ |
| 375 | gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ |
| 376 | status = "okay"; |
| 377 | }; |
| 378 | |
| 379 | &pcie_phy { |
| 380 | status = "okay"; |
| 381 | }; |
| 382 | |
| 383 | &pcie0 { |
| 384 | num-lanes = <4>; |
| 385 | pinctrl-names = "default"; |
| 386 | pinctrl-0 = <&pcie_clkreqn_cpm>; |
| 387 | vpcie3v3-supply = <&vcc3v3_pcie>; |
| 388 | status = "okay"; |
| 389 | }; |
| 390 | |
| 391 | &pmu_io_domains { |
| 392 | pmu1830-supply = <&vcc_1v8>; |
| 393 | status = "okay"; |
| 394 | }; |
| 395 | |
| 396 | &pinctrl { |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 397 | bt { |
| 398 | bt_enable_h: bt-enable-h { |
| 399 | rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; |
| 400 | }; |
| 401 | |
| 402 | bt_host_wake_l: bt-host-wake-l { |
| 403 | rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; |
| 404 | }; |
| 405 | |
| 406 | bt_wake_l: bt-wake-l { |
| 407 | rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; |
| 408 | }; |
| 409 | }; |
| 410 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 411 | sdmmc { |
| 412 | sdmmc_bus1: sdmmc-bus1 { |
| 413 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 414 | <4 RK_PB0 1 &pcfg_pull_up_8ma>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 415 | }; |
| 416 | |
| 417 | sdmmc_bus4: sdmmc-bus4 { |
| 418 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 419 | <4 RK_PB0 1 &pcfg_pull_up_8ma>, |
| 420 | <4 RK_PB1 1 &pcfg_pull_up_8ma>, |
| 421 | <4 RK_PB2 1 &pcfg_pull_up_8ma>, |
| 422 | <4 RK_PB3 1 &pcfg_pull_up_8ma>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 423 | }; |
| 424 | |
| 425 | sdmmc_clk: sdmmc-clk { |
| 426 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 427 | <4 RK_PB4 1 &pcfg_pull_none_18ma>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 428 | }; |
| 429 | |
| 430 | sdmmc_cmd: sdmmc-cmd { |
| 431 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 432 | <4 RK_PB5 1 &pcfg_pull_up_8ma>; |
| 433 | }; |
| 434 | }; |
| 435 | |
| 436 | sdio0 { |
| 437 | sdio0_bus4: sdio0-bus4 { |
| 438 | rockchip,pins = |
| 439 | <2 RK_PC4 1 &pcfg_pull_up_20ma>, |
| 440 | <2 RK_PC5 1 &pcfg_pull_up_20ma>, |
| 441 | <2 RK_PC6 1 &pcfg_pull_up_20ma>, |
| 442 | <2 RK_PC7 1 &pcfg_pull_up_20ma>; |
| 443 | }; |
| 444 | |
| 445 | sdio0_cmd: sdio0-cmd { |
| 446 | rockchip,pins = |
| 447 | <2 RK_PD0 1 &pcfg_pull_up_20ma>; |
| 448 | }; |
| 449 | |
| 450 | sdio0_clk: sdio0-clk { |
| 451 | rockchip,pins = |
| 452 | <2 RK_PD1 1 &pcfg_pull_none_20ma>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 453 | }; |
| 454 | }; |
| 455 | |
| 456 | pmic { |
| 457 | pmic_int_l: pmic-int-l { |
| 458 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 459 | <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 460 | }; |
| 461 | |
| 462 | vsel1_gpio: vsel1-gpio { |
| 463 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 464 | <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 465 | }; |
| 466 | |
| 467 | vsel2_gpio: vsel2-gpio { |
| 468 | rockchip,pins = |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 469 | <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; |
| 470 | }; |
| 471 | }; |
| 472 | |
| 473 | sdio-pwrseq { |
| 474 | wifi_enable_h: wifi-enable-h { |
| 475 | rockchip,pins = |
| 476 | <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 477 | }; |
| 478 | }; |
| 479 | |
| 480 | wifi { |
| 481 | wifi_host_wake_l: wifi-host-wake-l { |
| 482 | rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 483 | }; |
| 484 | }; |
| 485 | }; |
| 486 | |
| 487 | &pwm2 { |
| 488 | status = "okay"; |
| 489 | }; |
| 490 | |
| 491 | &pwm3 { |
| 492 | status = "okay"; |
| 493 | }; |
| 494 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 495 | &sdio0 { |
| 496 | bus-width = <4>; |
| 497 | clock-frequency = <50000000>; |
| 498 | cap-sdio-irq; |
| 499 | cap-sd-highspeed; |
| 500 | keep-power-in-suspend; |
| 501 | mmc-pwrseq = <&sdio_pwrseq>; |
| 502 | non-removable; |
| 503 | pinctrl-names = "default"; |
| 504 | pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; |
| 505 | sd-uhs-sdr104; |
| 506 | #address-cells = <1>; |
| 507 | #size-cells = <0>; |
| 508 | status = "okay"; |
| 509 | |
| 510 | brcmf: wifi@1 { |
| 511 | compatible = "brcm,bcm4329-fmac"; |
| 512 | reg = <1>; |
| 513 | interrupt-parent = <&gpio0>; |
| 514 | interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; |
| 515 | interrupt-names = "host-wake"; |
| 516 | pinctrl-names = "default"; |
| 517 | pinctrl-0 = <&wifi_host_wake_l>; |
| 518 | }; |
| 519 | }; |
| 520 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 521 | &sdhci { |
| 522 | bus-width = <8>; |
| 523 | mmc-hs400-1_8v; |
| 524 | mmc-hs400-enhanced-strobe; |
| 525 | non-removable; |
| 526 | status = "okay"; |
| 527 | }; |
| 528 | |
| 529 | &sdmmc { |
| 530 | bus-width = <4>; |
| 531 | cap-mmc-highspeed; |
| 532 | cap-sd-highspeed; |
| 533 | clock-frequency = <100000000>; |
| 534 | clock-freq-min-max = <100000 100000000>; |
| 535 | cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; |
| 536 | disable-wp; |
| 537 | sd-uhs-sdr104; |
| 538 | vqmmc-supply = <&vcc_sd>; |
| 539 | card-detect-delay = <800>; |
| 540 | pinctrl-names = "default"; |
| 541 | pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; |
| 542 | status = "okay"; |
| 543 | }; |
| 544 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 545 | &tsadc { |
| 546 | rockchip,hw-tshut-mode = <1>; |
| 547 | rockchip,hw-tshut-polarity = <1>; |
| 548 | rockchip,hw-tshut-temp = <110000>; |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 549 | status = "okay"; |
| 550 | }; |
| 551 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 552 | &uart0 { |
| 553 | pinctrl-names = "default"; |
| 554 | pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; |
| 555 | status = "okay"; |
| 556 | |
| 557 | bluetooth { |
| 558 | compatible = "brcm,bcm43438-bt"; |
| 559 | clocks = <&rk808 1>; |
| 560 | clock-names = "ext_clock"; |
| 561 | device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; |
| 562 | host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; |
| 563 | shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; |
| 564 | pinctrl-names = "default"; |
| 565 | pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; |
| 566 | }; |
| 567 | }; |
| 568 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 569 | &uart2 { |
| 570 | status = "okay"; |
| 571 | }; |
| 572 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 573 | &tcphy0 { |
| 574 | status = "okay"; |
| 575 | }; |
| 576 | |
| 577 | &tcphy1 { |
| 578 | status = "okay"; |
| 579 | }; |
| 580 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 581 | &u2phy0 { |
| 582 | status = "okay"; |
| 583 | }; |
| 584 | |
| 585 | &u2phy1 { |
| 586 | status = "okay"; |
| 587 | }; |
| 588 | |
| 589 | &u2phy0_host { |
| 590 | phy-supply = <&vcc5v0_host>; |
| 591 | status = "okay"; |
| 592 | }; |
| 593 | |
| 594 | &u2phy1_host { |
| 595 | phy-supply = <&vcc5v0_host>; |
| 596 | status = "okay"; |
| 597 | }; |
| 598 | |
| 599 | &u2phy0_otg { |
| 600 | status = "okay"; |
| 601 | }; |
| 602 | |
| 603 | &u2phy1_otg { |
| 604 | status = "okay"; |
| 605 | }; |
| 606 | |
| 607 | &usb_host0_ehci { |
| 608 | status = "okay"; |
| 609 | }; |
| 610 | |
| 611 | &usb_host0_ohci { |
| 612 | status = "okay"; |
| 613 | }; |
| 614 | |
| 615 | &usb_host1_ehci { |
| 616 | status = "okay"; |
| 617 | }; |
| 618 | |
| 619 | &usb_host1_ohci { |
| 620 | status = "okay"; |
| 621 | }; |
| 622 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 623 | &usbdrd3_0 { |
| 624 | status = "okay"; |
| 625 | }; |
| 626 | |
| 627 | &usbdrd_dwc3_0 { |
| 628 | status = "okay"; |
| 629 | }; |
| 630 | |
| 631 | &usbdrd3_1 { |
| 632 | status = "okay"; |
| 633 | }; |
| 634 | |
| 635 | &usbdrd_dwc3_1 { |
| 636 | status = "okay"; |
| 637 | }; |
| 638 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 639 | &vopb { |
| 640 | status = "okay"; |
| 641 | }; |
| 642 | |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 643 | &vopb_mmu { |
| 644 | status = "okay"; |
| 645 | }; |
| 646 | |
Manivannan Sadhasivam | 1bad5e1 | 2018-09-28 00:32:59 +0530 | [diff] [blame] | 647 | &vopl { |
| 648 | status = "okay"; |
| 649 | }; |
Peter Robinson | 9403f80 | 2019-07-01 17:05:49 +0100 | [diff] [blame] | 650 | |
| 651 | &vopl_mmu { |
| 652 | status = "okay"; |
| 653 | }; |