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wdenk7133d4c2002-09-12 22:42:52 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23#ifndef _POST_H
24#define _POST_H
25
26#ifndef __ASSEMBLY__
27#include <common.h>
28#endif
29
30#ifdef CONFIG_POST
31
32#define POST_POWERON 0x01 /* test runs on power-on booting */
wdenk8564acf2003-07-14 22:13:32 +000033#define POST_NORMAL 0x02 /* test runs on normal booting */
34#define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */
wdenk7133d4c2002-09-12 22:42:52 +000035#define POST_POWERTEST 0x08 /* test runs after watchdog reset */
36
wdenk27b207f2003-07-24 23:38:38 +000037#define POST_COLDBOOT 0x80 /* first boot after power-on */
38
wdenk7133d4c2002-09-12 22:42:52 +000039#define POST_ROM 0x0100 /* test runs in ROM */
40#define POST_RAM 0x0200 /* test runs in RAM */
41#define POST_MANUAL 0x0400 /* test runs on diag command */
42#define POST_REBOOT 0x0800 /* test may cause rebooting */
wdenk228f29a2002-12-08 09:53:23 +000043#define POST_PREREL 0x1000 /* test runs before relocation */
wdenk7133d4c2002-09-12 22:42:52 +000044
45#define POST_MEM (POST_RAM | POST_ROM)
wdenk8564acf2003-07-14 22:13:32 +000046#define POST_ALWAYS (POST_NORMAL | \
47 POST_SLOWTEST | \
48 POST_MANUAL | \
wdenk7133d4c2002-09-12 22:42:52 +000049 POST_POWERON )
50
51#ifndef __ASSEMBLY__
52
53struct post_test {
54 char *name;
55 char *cmd;
56 char *desc;
57 int flags;
58 int (*test) (int flags);
wdenk4532cb62003-04-27 22:52:51 +000059 int (*init_f) (void);
60 void (*reloc) (void);
wdenk228f29a2002-12-08 09:53:23 +000061 unsigned long testid;
wdenk7133d4c2002-09-12 22:42:52 +000062};
wdenk4532cb62003-04-27 22:52:51 +000063int post_init_f (void);
wdenk7133d4c2002-09-12 22:42:52 +000064void post_bootmode_init (void);
65int post_bootmode_get (unsigned int * last_test);
66void post_bootmode_clear (void);
wdenk228f29a2002-12-08 09:53:23 +000067void post_output_backlog ( void );
wdenk7133d4c2002-09-12 22:42:52 +000068int post_run (char *name, int flags);
69int post_info (char *name);
70int post_log (char *format, ...);
71void post_reloc (void);
wdenk4532cb62003-04-27 22:52:51 +000072unsigned long post_time_ms (unsigned long base);
wdenk7133d4c2002-09-12 22:42:52 +000073
74extern struct post_test post_list[];
75extern unsigned int post_list_size;
wdenk27b207f2003-07-24 23:38:38 +000076extern int post_hotkeys_pressed(void);
wdenk7133d4c2002-09-12 22:42:52 +000077
78#endif /* __ASSEMBLY__ */
79
80#define CFG_POST_RTC 0x00000001
81#define CFG_POST_WATCHDOG 0x00000002
82#define CFG_POST_MEMORY 0x00000004
83#define CFG_POST_CPU 0x00000008
84#define CFG_POST_I2C 0x00000010
85#define CFG_POST_CACHE 0x00000020
86#define CFG_POST_UART 0x00000040
87#define CFG_POST_ETHER 0x00000080
88#define CFG_POST_SPI 0x00000100
89#define CFG_POST_USB 0x00000200
90#define CFG_POST_SPR 0x00000400
wdenk4532cb62003-04-27 22:52:51 +000091#define CFG_POST_SYSMON 0x00000800
wdenk5a8c51c2004-04-15 21:16:42 +000092#define CFG_POST_DSP 0x00001000
wdenk79fa88f2004-06-07 23:46:25 +000093#define CFG_POST_CODEC 0x00002000
wdenk7133d4c2002-09-12 22:42:52 +000094
95#endif /* CONFIG_POST */
96
97#endif /* _POST_H */