Daniel Hellstrom | 6940383 | 2008-03-26 23:34:47 +0100 | [diff] [blame] | 1 | /* Configuration header file for Gaisler Research AB's Template |
| 2 | * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS |
| 3 | * Development board Stratix II edition, with the FPGA device |
| 4 | * EP2S60. |
| 5 | * |
| 6 | * (C) Copyright 2003-2005 |
| 7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 8 | * |
| 9 | * (C) Copyright 2008 |
| 10 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. |
| 11 | * |
| 12 | * See file CREDITS for list of people who contributed to this |
| 13 | * project. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License as |
| 17 | * published by the Free Software Foundation; either version 2 of |
| 18 | * the License, or (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, write to the Free Software |
| 27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 28 | * MA 02111-1307 USA |
| 29 | */ |
| 30 | |
| 31 | #ifndef __CONFIG_H__ |
| 32 | #define __CONFIG_H__ |
| 33 | |
| 34 | /* |
| 35 | * High Level Configuration Options |
| 36 | * (easy to change) |
| 37 | */ |
| 38 | |
| 39 | #define CONFIG_LEON3 /* This is an LEON3 CPU */ |
| 40 | #define CONFIG_LEON 1 /* This is an LEON CPU */ |
| 41 | /* Altera NIOS Development board, Stratix II board */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 42 | #define CONFIG_GR_EP2S60 1 |
Daniel Hellstrom | 6940383 | 2008-03-26 23:34:47 +0100 | [diff] [blame] | 43 | |
| 44 | /* CPU / AMBA BUS configuration */ |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */ |
Daniel Hellstrom | 6940383 | 2008-03-26 23:34:47 +0100 | [diff] [blame] | 46 | |
| 47 | /* Number of SPARC register windows */ |
| 48 | #define CFG_SPARC_NWINDOWS 8 |
| 49 | |
| 50 | /* Define this is the GR-2S60-MEZZ mezzanine is available and you |
| 51 | * want to use the USB and GRETH functionality of the board |
| 52 | */ |
| 53 | #undef GR_2S60_MEZZ |
| 54 | |
| 55 | #ifdef GR_2S60_MEZZ |
| 56 | #define USE_GRETH 1 |
| 57 | #define USE_GRUSB 1 |
| 58 | #endif |
| 59 | |
| 60 | /* |
| 61 | * Serial console configuration |
| 62 | */ |
| 63 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ |
| 64 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
| 65 | |
| 66 | /* Partitions */ |
| 67 | #define CONFIG_DOS_PARTITION |
| 68 | #define CONFIG_MAC_PARTITION |
| 69 | #define CONFIG_ISO_PARTITION |
| 70 | |
| 71 | /* |
| 72 | * Supported commands |
| 73 | */ |
| 74 | #include <config_cmd_default.h> |
| 75 | |
| 76 | #define CONFIG_CMD_REGINFO |
| 77 | #define CONFIG_CMD_AMBAPP |
| 78 | #define CONFIG_CMD_PING |
| 79 | #define CONFIG_CMD_DIAG |
| 80 | #define CONFIG_CMD_IRQ |
| 81 | |
| 82 | /* USB support */ |
| 83 | #if USE_GRUSB |
| 84 | #define CONFIG_USB_UHCI |
| 85 | #define CONFIG_CMD_FAT |
| 86 | #define CONFIG_CMD_EXT2 |
| 87 | #define CONFIG_CMD_USB |
| 88 | #define CONFIG_USB_STORAGE |
| 89 | /* Enable needed helper functions */ |
| 90 | #define CFG_DEVICE_DEREGISTER /* needs device_deregister */ |
| 91 | #endif |
| 92 | |
| 93 | /* |
| 94 | * Autobooting |
| 95 | */ |
| 96 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ |
| 97 | |
| 98 | #define CONFIG_PREBOOT "echo;" \ |
| 99 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ |
| 100 | "echo" |
| 101 | |
| 102 | #undef CONFIG_BOOTARGS |
| 103 | |
| 104 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 105 | "netdev=eth0\0" \ |
| 106 | "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ |
| 107 | "nfsroot=${serverip}:${rootpath}\0" \ |
| 108 | "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ |
| 109 | "addip=setenv bootargs ${bootargs} " \ |
| 110 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 111 | ":${hostname}:${netdev}:off panic=1\0" \ |
| 112 | "flash_nfs=run nfsargs addip;" \ |
| 113 | "bootm ${kernel_addr}\0" \ |
| 114 | "flash_self=run ramargs addip;" \ |
| 115 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ |
| 116 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ |
| 117 | "scratch=40800000\0" \ |
| 118 | "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \ |
| 119 | "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \ |
| 120 | "" |
| 121 | |
| 122 | #define CONFIG_NETMASK 255.255.255.0 |
| 123 | #define CONFIG_GATEWAYIP 192.168.0.1 |
| 124 | #define CONFIG_SERVERIP 192.168.0.20 |
| 125 | #define CONFIG_IPADDR 192.168.0.207 |
| 126 | #define CONFIG_ROOTPATH /export/rootfs |
| 127 | #define CONFIG_HOSTNAME ml401 |
| 128 | #define CONFIG_BOOTFILE /uImage |
| 129 | |
| 130 | #define CONFIG_BOOTCOMMAND "run flash_self" |
| 131 | |
| 132 | /* Memory MAP |
| 133 | * |
| 134 | * Flash: |
| 135 | * |--------------------------------| |
| 136 | * | 0x00000000 Text & Data & BSS | * |
| 137 | * | for Monitor | * |
| 138 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * |
| 139 | * | UNUSED / Growth | * 256kb |
| 140 | * |--------------------------------| |
| 141 | * | 0x00050000 Base custom area | * |
| 142 | * | kernel / FS | * |
| 143 | * | | * Rest of Flash |
| 144 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| |
| 145 | * | END-0x00008000 Environment | * 32kb |
| 146 | * |--------------------------------| |
| 147 | * |
| 148 | * |
| 149 | * |
| 150 | * Main Memory: |
| 151 | * |--------------------------------| |
| 152 | * | UNUSED / scratch area | |
| 153 | * | | |
| 154 | * | | |
| 155 | * | | |
| 156 | * | | |
| 157 | * |--------------------------------| |
| 158 | * | Monitor .Text / .DATA / .BSS | * 512kb |
| 159 | * | Relocated! | * |
| 160 | * |--------------------------------| |
| 161 | * | Monitor Malloc | * 128kb (contains relocated environment) |
| 162 | * |--------------------------------| |
| 163 | * | Monitor/kernel STACK | * 64kb |
| 164 | * |--------------------------------| |
| 165 | * | Page Table for MMU systems | * 2k |
| 166 | * |--------------------------------| |
| 167 | * | PROM Code accessed from Linux | * 6kb-128b |
| 168 | * |--------------------------------| |
| 169 | * | Global data (avail from kernel)| * 128b |
| 170 | * |--------------------------------| |
| 171 | * |
| 172 | */ |
| 173 | |
| 174 | /* |
| 175 | * Flash configuration (8,16 or 32 MB) |
| 176 | * TEXT base always at 0xFFF00000 |
| 177 | * ENV_ADDR always at 0xFFF40000 |
| 178 | * FLASH_BASE at 0xFC000000 for 64 MB |
| 179 | * 0xFE000000 for 32 MB |
| 180 | * 0xFF000000 for 16 MB |
| 181 | * 0xFF800000 for 8 MB |
| 182 | */ |
| 183 | /*#define CFG_NO_FLASH 1*/ |
| 184 | #define CFG_FLASH_BASE 0x00000000 |
| 185 | #define CFG_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */ |
| 186 | |
| 187 | #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ |
| 188 | #define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ |
| 189 | #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ |
| 190 | |
| 191 | #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
| 192 | #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ |
| 193 | #define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ |
| 194 | #define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ |
| 195 | #define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
| 196 | |
| 197 | /*** CFI CONFIG ***/ |
| 198 | #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 199 | #define CONFIG_FLASH_CFI_DRIVER |
Daniel Hellstrom | 6940383 | 2008-03-26 23:34:47 +0100 | [diff] [blame] | 200 | #define CFG_FLASH_CFI |
| 201 | /* Bypass cache when reading regs from flash memory */ |
| 202 | #define CFG_FLASH_CFI_BYPASS_READ |
| 203 | /* Buffered writes (32byte/go) instead of single accesses */ |
| 204 | #define CFG_FLASH_USE_BUFFER_WRITE |
| 205 | |
| 206 | /* |
| 207 | * Environment settings |
| 208 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 93f6d72 | 2008-09-10 22:48:00 +0200 | [diff] [blame] | 209 | /*#define CONFIG_ENV_IS_NOWHERE 1*/ |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame^] | 210 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Daniel Hellstrom | 6940383 | 2008-03-26 23:34:47 +0100 | [diff] [blame] | 211 | /* CFG_ENV_ADDR need to be at sector boundary */ |
| 212 | #define CFG_ENV_SIZE 0x8000 |
| 213 | #define CFG_ENV_SECT_SIZE 0x20000 |
| 214 | #define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CFG_ENV_SECT_SIZE) |
| 215 | #define CONFIG_ENV_OVERWRITE 1 |
| 216 | |
| 217 | /* |
| 218 | * Memory map |
| 219 | */ |
| 220 | #define CFG_SDRAM_BASE 0x40000000 |
| 221 | #define CFG_SDRAM_SIZE 0x02000000 |
| 222 | #define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE) |
| 223 | |
| 224 | /* no SRAM available */ |
| 225 | #undef CFG_SRAM_BASE |
| 226 | #undef CFG_SRAM_SIZE |
| 227 | |
| 228 | #define CFG_RAM_BASE CFG_SDRAM_BASE |
| 229 | #define CFG_RAM_SIZE CFG_SDRAM_SIZE |
| 230 | #define CFG_RAM_END CFG_SDRAM_END |
| 231 | |
| 232 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 233 | #define CFG_GBL_DATA_OFFSET (CFG_SDRAM_END - CFG_GBL_DATA_SIZE) |
| 234 | |
| 235 | #define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE) |
| 236 | #define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE) |
| 237 | |
| 238 | #define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32) |
| 239 | #define CFG_STACK_SIZE (0x10000-32) |
| 240 | |
| 241 | #define CFG_MONITOR_BASE TEXT_BASE |
| 242 | #if (CFG_MONITOR_BASE < CFG_FLASH_BASE) |
| 243 | # define CFG_RAMBOOT 1 |
| 244 | #endif |
| 245 | |
| 246 | #define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */ |
| 247 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
| 248 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
| 249 | |
| 250 | #define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE) |
| 251 | #define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN) |
| 252 | |
| 253 | /* relocated monitor area */ |
| 254 | #define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE |
| 255 | #define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN) |
| 256 | |
| 257 | /* make un relocated address from relocated address */ |
| 258 | #define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE)) |
| 259 | |
| 260 | /* |
| 261 | * Ethernet configuration uses on board SMC91C111, however if a mezzanine |
| 262 | * with a PHY is attached the GRETH can be used on this board. |
| 263 | * Define USE_GRETH in order to use the mezzanine provided PHY with the |
| 264 | * onchip GRETH network MAC, note that this is not supported by the |
| 265 | * template design. |
| 266 | */ |
| 267 | #ifndef USE_GRETH |
| 268 | |
| 269 | /* USE SMC91C111 MAC */ |
| 270 | #define CONFIG_DRIVER_SMC91111 1 |
| 271 | #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ |
| 272 | #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ |
| 273 | #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ |
| 274 | /*#define CONFIG_SHOW_ACTIVITY*/ |
| 275 | #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ |
| 276 | |
| 277 | #else |
| 278 | |
| 279 | /* USE GRETH Ethernet Driver */ |
| 280 | #define CONFIG_NET_MULTI 1 |
| 281 | #define CONFIG_GRETH 1 |
| 282 | |
| 283 | /* Default GRETH Ethernet HARDWARE address */ |
| 284 | #define GRETH_HWADDR_0 0x00 |
| 285 | #define GRETH_HWADDR_1 0x00 |
| 286 | #define GRETH_HWADDR_2 0x7a |
| 287 | #define GRETH_HWADDR_3 0xcc |
| 288 | #define GRETH_HWADDR_4 0x00 |
| 289 | #define GRETH_HWADDR_5 0x13 |
| 290 | #endif |
| 291 | |
| 292 | #define CONFIG_ETHADDR 00:00:7a:cc:00:13 |
| 293 | #define CONFIG_PHY_ADDR 0x00 |
| 294 | |
| 295 | /* |
| 296 | * Miscellaneous configurable options |
| 297 | */ |
| 298 | #define CFG_LONGHELP /* undef to save memory */ |
| 299 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
| 300 | #if defined(CONFIG_CMD_KGDB) |
| 301 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 302 | #else |
| 303 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 304 | #endif |
| 305 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
| 306 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 307 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 308 | |
| 309 | #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ |
| 310 | #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ |
| 311 | |
| 312 | #define CFG_LOAD_ADDR 0x100000 /* default load address */ |
| 313 | |
| 314 | #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
| 315 | |
| 316 | /*----------------------------------------------------------------------- |
| 317 | * USB stuff |
| 318 | *----------------------------------------------------------------------- |
| 319 | */ |
| 320 | #define CONFIG_USB_CLOCK 0x0001BBBB |
| 321 | #define CONFIG_USB_CONFIG 0x00005000 |
| 322 | |
| 323 | /***** Gaisler GRLIB IP-Cores Config ********/ |
| 324 | |
| 325 | /* AMBA Plug & Play info display on startup */ |
| 326 | /*#define CFG_AMBAPP_PRINT_ON_STARTUP*/ |
| 327 | |
| 328 | #define CFG_GRLIB_SDRAM 0 |
| 329 | |
| 330 | /* See, GRLIB Docs (grip.pdf) on how to set up |
| 331 | * These the memory controller registers. |
| 332 | */ |
| 333 | #define CFG_GRLIB_MEMCFG1 (0x10f800ff | (1<<11)) |
| 334 | #define CFG_GRLIB_MEMCFG2 0x00000000 |
| 335 | #define CFG_GRLIB_MEMCFG3 0x00000000 |
| 336 | |
| 337 | #define CFG_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11)) |
| 338 | #define CFG_GRLIB_FT_MEMCFG2 0x00000000 |
| 339 | #define CFG_GRLIB_FT_MEMCFG3 0x00000000 |
| 340 | |
| 341 | #define CFG_GRLIB_DDR_CFG 0xa900830a |
| 342 | |
| 343 | #define CFG_GRLIB_DDR2_CFG1 0x00000000 |
| 344 | #define CFG_GRLIB_DDR2_CFG3 0x00000000 |
| 345 | |
| 346 | /* Calculate scaler register value from default baudrate */ |
| 347 | #define CFG_GRLIB_APBUART_SCALER \ |
| 348 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
| 349 | |
| 350 | /* Identification string */ |
| 351 | #define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60" |
| 352 | |
| 353 | /* default kernel command line */ |
| 354 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" |
| 355 | |
| 356 | #endif /* __CONFIG_H */ |