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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 5aaad0647a582602078be143ca30faefb16498a2 / . / arch / arm / dts / vf.dtsi
blob: d7d21a37adeb077ee4c4f9776d475d75589602f6 [file] [log] [blame]
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+ or X11
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]5 */
6/include/ "skeleton.dtsi"
Sanchayan Maity5aaad062016-08-09 23:45:00 +0530[diff] [blame^]7#include <dt-bindings/gpio/gpio.h>
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]8
9/ {
10 aliases {
11 gpio0 = &gpio0;
12 gpio1 = &gpio1;
13 gpio2 = &gpio2;
14 gpio3 = &gpio3;
15 gpio4 = &gpio4;
Bhuvanchandra DVd5e4f0a2016-01-27 10:31:45 +0530[diff] [blame]16 serial0 = &uart0;
17 serial1 = &uart1;
18 serial2 = &uart2;
19 serial3 = &uart3;
20 serial4 = &uart4;
21 serial5 = &uart5;
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]22 spi0 = &dspi0;
23 spi1 = &dspi1;
Sanchayan Maity5aaad062016-08-09 23:45:00 +0530[diff] [blame^]24 ehci0 = &ehci0;
25 ehci1 = &ehci1;
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]26 };
27
28 soc {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 compatible = "simple-bus";
32 ranges;
33
34 aips0: aips-bus@40000000 {
35 compatible = "fsl,aips-bus", "simple-bus";
36 #address-cells = <1>;
37 #size-cells = <1>;
38 ranges;
39
Bhuvanchandra DVd5e4f0a2016-01-27 10:31:45 +0530[diff] [blame]40 uart0: serial@40027000 {
41 compatible = "fsl,vf610-lpuart";
42 reg = <0x40027000 0x1000>;
43 status = "disabled";
44 };
45
46 uart1: serial@40028000 {
47 compatible = "fsl,vf610-lpuart";
48 reg = <0x40028000 0x1000>;
49 status = "disabled";
50 };
51
52 uart2: serial@40029000 {
53 compatible = "fsl,vf610-lpuart";
54 reg = <0x40029000 0x1000>;
55 status = "disabled";
56 };
57
58 uart3: serial@4002a000 {
59 compatible = "fsl,vf610-lpuart";
60 reg = <0x4002a000 0x1000>;
61 status = "disabled";
62 };
63
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]64 dspi0: dspi0@4002c000 {
65 #address-cells = <1>;
66 #size-cells = <0>;
67 compatible = "fsl,vf610-dspi";
68 reg = <0x4002c000 0x1000>;
69 num-cs = <5>;
70 status = "disabled";
71 };
72
73 dspi1: dspi1@4002d000 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 compatible = "fsl,vf610-dspi";
77 reg = <0x4002d000 0x1000>;
78 num-cs = <5>;
79 status = "disabled";
80 };
81
82 qspi0: quadspi@40044000 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 compatible = "fsl,vf610-qspi";
86 reg = <0x40044000 0x1000>;
87 status = "disabled";
88 };
89
90 gpio0: gpio@40049000 {
91 compatible = "fsl,vf610-gpio";
92 reg = <0x400ff000 0x40>;
93 #gpio-cells = <2>;
94 };
95
96 gpio1: gpio@4004a000 {
97 compatible = "fsl,vf610-gpio";
98 reg = <0x400ff040 0x40>;
99 #gpio-cells = <2>;
100 };
101
102 gpio2: gpio@4004b000 {
103 compatible = "fsl,vf610-gpio";
104 reg = <0x400ff080 0x40>;
105 #gpio-cells = <2>;
106 };
107
108 gpio3: gpio@4004c000 {
109 compatible = "fsl,vf610-gpio";
110 reg = <0x400ff0c0 0x40>;
111 #gpio-cells = <2>;
112 };
113
114 gpio4: gpio@4004d000 {
115 compatible = "fsl,vf610-gpio";
116 reg = <0x400ff100 0x40>;
117 #gpio-cells = <2>;
118 };
Sanchayan Maity5aaad062016-08-09 23:45:00 +0530[diff] [blame^]119
120 ehci0: ehci@40034000 {
121 compatible = "fsl,vf610-usb";
122 reg = <0x40034000 0x800>;
123 status = "disabled";
124 };
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]125 };
126
127 aips1: aips-bus@40080000 {
128 compatible = "fsl,aips-bus", "simple-bus";
129 #address-cells = <1>;
130 #size-cells = <1>;
131 ranges;
Bhuvanchandra DVd5e4f0a2016-01-27 10:31:45 +0530[diff] [blame]132
133 uart4: serial@400a9000 {
134 compatible = "fsl,vf610-lpuart";
135 reg = <0x400a9000 0x1000>;
136 status = "disabled";
137 };
138
139 uart5: serial@400aa000 {
140 compatible = "fsl,vf610-lpuart";
141 reg = <0x400aa000 0x1000>;
142 status = "disabled";
143 };
144
Sanchayan Maity5aaad062016-08-09 23:45:00 +0530[diff] [blame^]145 ehci1: ehci@400b4000 {
146 compatible = "fsl,vf610-usb";
147 reg = <0x400b4000 0x800>;
148 status = "disabled";
149 };
Bhuvanchandra DVd4700302015-06-01 18:37:21 +0530[diff] [blame]150 };
151 };
152};