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Joe Hershbergerf070b1a2018-07-17 15:02:30 -05001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Florinel Iordache5d3bcdb2020-03-16 15:35:59 +02004 * Copyright 2020 NXP
Joe Hershbergerf070b1a2018-07-17 15:02:30 -05005 * Andy Fleming <afleming@gmail.com>
6 *
7 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
8 */
9
10#ifndef _PHY_INTERFACE_H
11#define _PHY_INTERFACE_H
12
Simon Glass2a64ada2020-07-19 10:15:39 -060013#include <string.h>
14
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050015typedef enum {
Marek Behúnc677fb12022-04-07 00:33:04 +020016 PHY_INTERFACE_MODE_NA, /* don't touch */
Marek Vasut75d28892023-03-21 18:25:54 +010017 PHY_INTERFACE_MODE_INTERNAL,
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050018 PHY_INTERFACE_MODE_MII,
19 PHY_INTERFACE_MODE_GMII,
20 PHY_INTERFACE_MODE_SGMII,
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050021 PHY_INTERFACE_MODE_TBI,
Marek Vasut75d28892023-03-21 18:25:54 +010022 PHY_INTERFACE_MODE_REVMII,
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050023 PHY_INTERFACE_MODE_RMII,
Marek Vasut75d28892023-03-21 18:25:54 +010024 PHY_INTERFACE_MODE_REVRMII,
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050025 PHY_INTERFACE_MODE_RGMII,
26 PHY_INTERFACE_MODE_RGMII_ID,
27 PHY_INTERFACE_MODE_RGMII_RXID,
28 PHY_INTERFACE_MODE_RGMII_TXID,
29 PHY_INTERFACE_MODE_RTBI,
Marek Vasut75d28892023-03-21 18:25:54 +010030 PHY_INTERFACE_MODE_SMII,
31 PHY_INTERFACE_MODE_XGMII,
32 PHY_INTERFACE_MODE_XLGMII,
33 PHY_INTERFACE_MODE_MOCA,
34 PHY_INTERFACE_MODE_QSGMII,
35 PHY_INTERFACE_MODE_TRGMII,
36 PHY_INTERFACE_MODE_100BASEX,
Stefan Chulski16bacd52021-05-03 08:08:44 +020037 PHY_INTERFACE_MODE_1000BASEX,
38 PHY_INTERFACE_MODE_2500BASEX,
Marek Vasut166ea492023-03-21 18:25:53 +010039 PHY_INTERFACE_MODE_5GBASER,
Marek Vasut75d28892023-03-21 18:25:54 +010040 PHY_INTERFACE_MODE_RXAUI,
41 PHY_INTERFACE_MODE_XAUI,
42 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
43 PHY_INTERFACE_MODE_10GBASER,
44 PHY_INTERFACE_MODE_25GBASER,
45 PHY_INTERFACE_MODE_USXGMII,
46 /* 10GBASE-KR - with Clause 73 AN */
47 PHY_INTERFACE_MODE_10GKR,
48 PHY_INTERFACE_MODE_QUSGMII,
49 PHY_INTERFACE_MODE_1000BASEKX,
50#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
51 /* LX2160A SERDES modes */
Priyanka Jain5b723982018-08-27 15:15:19 +053052 PHY_INTERFACE_MODE_25G_AUI,
53 PHY_INTERFACE_MODE_XLAUI,
54 PHY_INTERFACE_MODE_CAUI2,
55 PHY_INTERFACE_MODE_CAUI4,
Marek Vasut75d28892023-03-21 18:25:54 +010056#endif
57#if defined(CONFIG_PHY_NCSI)
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +100058 PHY_INTERFACE_MODE_NCSI,
Marek Vasut75d28892023-03-21 18:25:54 +010059#endif
Marek Behún6706d7d2022-04-07 00:33:02 +020060 PHY_INTERFACE_MODE_MAX,
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050061} phy_interface_t;
62
63static const char * const phy_interface_strings[] = {
Marek Vasut75d28892023-03-21 18:25:54 +010064 [PHY_INTERFACE_MODE_NA] = "",
65 [PHY_INTERFACE_MODE_INTERNAL] = "internal",
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050066 [PHY_INTERFACE_MODE_MII] = "mii",
67 [PHY_INTERFACE_MODE_GMII] = "gmii",
68 [PHY_INTERFACE_MODE_SGMII] = "sgmii",
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050069 [PHY_INTERFACE_MODE_TBI] = "tbi",
Marek Vasut75d28892023-03-21 18:25:54 +010070 [PHY_INTERFACE_MODE_REVMII] = "rev-mii",
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050071 [PHY_INTERFACE_MODE_RMII] = "rmii",
Marek Vasut75d28892023-03-21 18:25:54 +010072 [PHY_INTERFACE_MODE_REVRMII] = "rev-rmii",
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050073 [PHY_INTERFACE_MODE_RGMII] = "rgmii",
74 [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id",
75 [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
76 [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
77 [PHY_INTERFACE_MODE_RTBI] = "rtbi",
Marek Vasut75d28892023-03-21 18:25:54 +010078 [PHY_INTERFACE_MODE_SMII] = "smii",
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050079 [PHY_INTERFACE_MODE_XGMII] = "xgmii",
Marek Vasut75d28892023-03-21 18:25:54 +010080 [PHY_INTERFACE_MODE_XLGMII] = "xlgmii",
81 [PHY_INTERFACE_MODE_MOCA] = "moca",
82 [PHY_INTERFACE_MODE_QSGMII] = "qsgmii",
83 [PHY_INTERFACE_MODE_TRGMII] = "trgmii",
84 [PHY_INTERFACE_MODE_1000BASEX] = "1000base-x",
85 [PHY_INTERFACE_MODE_1000BASEKX] = "1000base-kx",
86 [PHY_INTERFACE_MODE_2500BASEX] = "2500base-x",
Marek Vasut166ea492023-03-21 18:25:53 +010087 [PHY_INTERFACE_MODE_5GBASER] = "5gbase-r",
Marek Vasut75d28892023-03-21 18:25:54 +010088 [PHY_INTERFACE_MODE_RXAUI] = "rxaui",
89 [PHY_INTERFACE_MODE_XAUI] = "xaui",
90 [PHY_INTERFACE_MODE_10GBASER] = "10gbase-r",
91 [PHY_INTERFACE_MODE_25GBASER] = "25gbase-r",
92 [PHY_INTERFACE_MODE_USXGMII] = "usxgmii",
93 [PHY_INTERFACE_MODE_10GKR] = "10gbase-kr",
94 [PHY_INTERFACE_MODE_100BASEX] = "100base-x",
95 [PHY_INTERFACE_MODE_QUSGMII] = "qusgmii",
96#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
97 /* LX2160A SERDES modes */
Priyanka Jain5b723982018-08-27 15:15:19 +053098 [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui",
99 [PHY_INTERFACE_MODE_XLAUI] = "xlaui4",
100 [PHY_INTERFACE_MODE_CAUI2] = "caui2",
101 [PHY_INTERFACE_MODE_CAUI4] = "caui4",
Marek Vasut75d28892023-03-21 18:25:54 +0100102#endif
103#if defined(CONFIG_PHY_NCSI)
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000104 [PHY_INTERFACE_MODE_NCSI] = "NC-SI",
Marek Vasut75d28892023-03-21 18:25:54 +0100105#endif
Joe Hershbergerf070b1a2018-07-17 15:02:30 -0500106};
107
Florinel Iordache5d3bcdb2020-03-16 15:35:59 +0200108/* Backplane modes:
109 * are considered a sub-type of phy_interface_t: XGMII
110 * and are specified in "phy-connection-type" with one of the following strings
111 */
112static const char * const backplane_mode_strings[] = {
113 "10gbase-kr",
114 "40gbase-kr4",
115};
116
Joe Hershbergerf070b1a2018-07-17 15:02:30 -0500117static inline const char *phy_string_for_interface(phy_interface_t i)
118{
119 /* Default to unknown */
Tim Harveyfaa6ce62022-05-10 15:49:10 -0700120 if (i >= PHY_INTERFACE_MODE_MAX)
Marek Behúnffb0f6f2022-04-07 00:33:03 +0200121 i = PHY_INTERFACE_MODE_NA;
Joe Hershbergerf070b1a2018-07-17 15:02:30 -0500122
123 return phy_interface_strings[i];
124}
125
Florinel Iordache5d3bcdb2020-03-16 15:35:59 +0200126static inline bool is_backplane_mode(const char *phyconn)
127{
128 int i;
129
130 if (!phyconn)
131 return false;
132 for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) {
133 if (!strcmp(phyconn, backplane_mode_strings[i]))
134 return true;
135 }
136 return false;
137}
138
Joe Hershbergerf070b1a2018-07-17 15:02:30 -0500139#endif /* _PHY_INTERFACE_H */