| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 2 | /* |
| 3 | * include/configs/alt.h |
| 4 | * This file is alt board configuration. |
| 5 | * |
| 6 | * Copyright (C) 2014 Renesas Electronics Corporation |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __ALT_H |
| 10 | #define __ALT_H |
| 11 | |
| Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 12 | #include "rcar-gen2-common.h" |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 13 | |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 14 | #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 |
| 15 | #define STACK_AREA_SIZE 0x00100000 |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 16 | #define LOW_LEVEL_MERAM_STACK \ |
| 17 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| 18 | |
| 19 | /* MEMORY */ |
| Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 20 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 21 | #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) |
| 22 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 23 | |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 24 | /* FLASH */ |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 25 | #define CONFIG_SPI_FLASH_QUAD |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 26 | |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 27 | /* SH Ether */ |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 28 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 29 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 |
| 30 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
| 31 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 32 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 33 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 34 | #define CONFIG_BITBANGMII_MULTI |
| 35 | |
| 36 | /* Board Clock */ |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 37 | #define RMOBILE_XTAL_CLK 20000000u |
| 38 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 39 | |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 40 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| Marek Vasut | 8c56350 | 2019-03-30 08:04:29 +0100 | [diff] [blame] | 41 | "bootm_size=0x10000000\0" \ |
| 42 | "usb_pgood_delay=2000\0" |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 43 | |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 44 | /* SPL support */ |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 45 | #define CONFIG_SPL_STACK 0xe6340000 |
| 46 | #define CONFIG_SPL_MAX_SIZE 0x4000 |
| Marek Vasut | bb6d2ff | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 47 | #ifdef CONFIG_SPL_BUILD |
| 48 | #define CONFIG_CONS_SCIF2 |
| 49 | #define CONFIG_SH_SCIF_CLK_FREQ 65000000 |
| 50 | #endif |
| Nobuhiro Iwamatsu | 25f9613 | 2014-11-19 14:26:33 +0900 | [diff] [blame] | 51 | |
| Nobuhiro Iwamatsu | cff2f5f | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 52 | #endif /* __ALT_H */ |