blob: bc102eecf29bbc9dee8b20e44cf17cb4f6c6520e [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +01002/*
3 * (C) Copyright 2007-2013
4 * Stelian Pop <stelian.pop@leadtechdesign.com>
5 * Lead Tech Design <www.leadtechdesign.com>
6 * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com>
7 * Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
8 *
9 * Settings for Calao USB-A9263 board
10 *
11 * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap
12 * installed on board will not be able to load it properly.
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17#include <asm/hardware.h>
18
19/* ARM asynchronous clock */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
21#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010022
23#define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263
24
25#define CONFIG_ARCH_CPU_INIT
26
27#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
28#define CONFIG_SETUP_MEMORY_TAGS
29#define CONFIG_INITRD_TAG
30
31#define CONFIG_SKIP_LOWLEVEL_INIT
32
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010033/*
34 * Hardware drivers
35 */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010036/*
37 * BOOTP options
38 */
39#define CONFIG_BOOTP_BOOTFILESIZE
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010040
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010041/* SDRAM */
42#define CONFIG_NR_DRAM_BANKS 1
43#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
44#define CONFIG_SYS_SDRAM_SIZE 0x04000000
45
46#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou.Yang@microchip.comfdc77182017-07-21 17:07:46 +080047 (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010048
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010049/* NAND flash */
50#ifdef CONFIG_CMD_NAND
51#define CONFIG_NAND_ATMEL
52#define CONFIG_SYS_MAX_NAND_DEVICE 1
53#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
54/* our ALE is AD21 */
55#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
56/* our CLE is AD22 */
57#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
58#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
59#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
60#endif
61
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010062/* Ethernet */
63#define CONFIG_MACB
64#define CONFIG_RMII
65#define CONFIG_NET_RETRY_COUNT 20
66#define CONFIG_AT91_WANTS_COMMON_PHY
67
68/* USB */
69#ifdef CONFIG_CMD_USB
70#define CONFIG_USB_ATMEL
71#define CONFIG_USB_OHCI_NEW
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010072#define CONFIG_SYS_USB_OHCI_CPU_INIT
73#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
74#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
75#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010076#endif
77
78#define CONFIG_SYS_LOAD_ADDR 0x22000000
79
80#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
81#define CONFIG_SYS_MEMTEST_END 0x23e00000
82
Wenyou.Yang@microchip.comfdc77182017-07-21 17:07:46 +080083/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010084#define CONFIG_ENV_OFFSET 0x2000
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010085#define CONFIG_ENV_SIZE 0x2000
Wenyou.Yang@microchip.comfdc77182017-07-21 17:07:46 +080086#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
87#define CONFIG_ENV_SPI_MAX_HZ 15000000
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010088#define CONFIG_BOOTCOMMAND "nboot 21000000 0"
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010089#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini43ede0b2017-10-22 17:55:07 -040090 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010091
Mateusz Kulikowski1dcdd862013-12-02 23:30:58 +010092/*
93 * Size of malloc() pool
94 */
95#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
96
97#endif