blob: a3d777dfaddc7b16f23ea8c25e15ce8f2bc62fc2 [file] [log] [blame]
Tom Rix660888b2009-05-31 12:44:37 +02001/*
2 * Copyright (c) 2009 Wind River Systems, Inc.
3 * Tom Rix <Tom.Rix@windriver.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 *
20 * This file was adapted from cpu/mpc5xxx/serial.c
21 *
22 */
23
24#include <common.h>
25#include <serial.h>
26#include <ns16550.h>
27#include <asm/arch/cpu.h>
28#include "zoom2_serial.h"
29
30int quad_init_dev (unsigned long base)
31{
32 /*
33 * The Quad UART is on the debug board.
34 * Check if the debug board is attached before using the UART
35 */
36 if (zoom2_debug_board_connected ()) {
37 NS16550_t com_port = (NS16550_t) base;
38 int baud_divisor = CONFIG_SYS_NS16550_CLK / 16 /
39 CONFIG_BAUDRATE;
40
41 /*
42 * Zoom2 has a board specific initialization of its UART.
43 * This generic initialization has been copied from
44 * drivers/serial/ns16550.c. The macros have been expanded.
45 *
46 * Do the following instead of
47 *
48 * NS16550_init (com_port, clock_divisor);
49 */
50 com_port->ier = 0x00;
51
52 /*
53 * On Zoom2 board Set pre-scalar to 1
54 * CLKSEL is GND => MCR[7] is 1 => preslr is 4
55 * So change the prescl to 1
56 */
57 com_port->lcr = 0xBF;
58 com_port->fcr |= 0x10;
59 com_port->mcr &= 0x7F;
60
61 /* This is generic ns16550.c setup */
62 com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1;
63 com_port->dll = 0;
64 com_port->dlm = 0;
65 com_port->lcr = UART_LCR_8N1;
66 com_port->mcr = UART_MCR_DTR | UART_MCR_RTS;
67 com_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR |
68 UART_FCR_TXSR;
69 com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1;
70 com_port->dll = baud_divisor & 0xff;
71 com_port->dlm = (baud_divisor >> 8) & 0xff;
72 com_port->lcr = UART_LCR_8N1;
73 }
74 /*
75 * We have to lie here, otherwise the board init code will hang
76 * on the check
77 */
78 return 0;
79}
80
81void quad_putc_dev (unsigned long base, const char c)
82{
83 if (zoom2_debug_board_connected ()) {
84
85 if (c == '\n')
86 quad_putc_dev (base, '\r');
87
88 NS16550_putc ((NS16550_t) base, c);
89 }
90}
91
92void quad_puts_dev (unsigned long base, const char *s)
93{
94 if (zoom2_debug_board_connected ()) {
95 while ((s != NULL) && (*s != '\0'))
96 quad_putc_dev (base, *s++);
97 }
98}
99
100int quad_getc_dev (unsigned long base)
101{
102 if (zoom2_debug_board_connected ())
103 return NS16550_getc ((NS16550_t) base);
104 else
105 return 0;
106}
107
108int quad_tstc_dev (unsigned long base)
109{
110 if (zoom2_debug_board_connected ())
111 return NS16550_tstc ((NS16550_t) base);
112 else
113 return 0;
114}
115
116void quad_setbrg_dev (unsigned long base)
117{
118 if (zoom2_debug_board_connected ()) {
119
120 int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 /
121 CONFIG_BAUDRATE;
122
123 NS16550_reinit ((NS16550_t) base, clock_divisor);
124 }
125}
126
127QUAD_INIT (0)
128QUAD_INIT (1)
129QUAD_INIT (2)
130QUAD_INIT (3)