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wdenkc0218802003-03-27 12:09:35 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <asm/addrspace.h>
27#include <asm/inca-ip.h>
Jean-Christophe PLAGNIOL-VILLARD5c150102007-11-13 09:11:05 +010028#include <asm/io.h>
Shinya Kuribayashib0c66af2008-03-25 21:30:07 +090029#include <asm/reboot.h>
wdenkc0218802003-03-27 12:09:35 +000030
wdenk85ec0bc2003-03-31 16:34:49 +000031extern uint incaip_get_cpuclk(void);
32
Shinya Kuribayashib0c66af2008-03-25 21:30:07 +090033void _machine_restart(void)
34{
35 *INCA_IP_WDT_RST_REQ = 0x3f;
36}
37
wdenkc0218802003-03-27 12:09:35 +000038static ulong max_sdram_size(void)
39{
40 /* The only supported SDRAM data width is 16bit.
41 */
42#define CFG_DW 2
43
44 /* The only supported number of SDRAM banks is 4.
45 */
46#define CFG_NB 4
47
48 ulong cfgpb0 = *INCA_IP_SDRAM_MC_CFGPB0;
49 int cols = cfgpb0 & 0xF;
50 int rows = (cfgpb0 & 0xF0) >> 4;
51 ulong size = (1 << (rows + cols)) * CFG_DW * CFG_NB;
52
53 return size;
54}
55
wdenkc0218802003-03-27 12:09:35 +000056long int initdram(int board_type)
57{
58 int rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0;
59 ulong size, max_size = 0;
60 ulong our_address;
61
62 asm volatile ("move %0, $25" : "=r" (our_address) :);
63
64 /* Can't probe for RAM size unless we are running from Flash.
65 */
66 if (PHYSADDR(our_address) < PHYSADDR(PHYS_FLASH_1))
67 {
68 return max_sdram_size();
69 }
70
71 for (cols = 0x8; cols <= 0xC; cols++)
72 {
73 for (rows = 0xB; rows <= 0xD; rows++)
74 {
75 *INCA_IP_SDRAM_MC_CFGPB0 = (0x14 << 8) |
76 (rows << 4) | cols;
Wolfgang Denkf013dac2005-12-04 00:40:34 +010077 size = get_ram_size((long *)CFG_SDRAM_BASE,
wdenkc0218802003-03-27 12:09:35 +000078 max_sdram_size());
79
80 if (size > max_size)
81 {
82 best_val = *INCA_IP_SDRAM_MC_CFGPB0;
83 max_size = size;
84 }
85 }
86 }
87
88 *INCA_IP_SDRAM_MC_CFGPB0 = best_val;
89 return max_size;
90}
91
wdenk85ec0bc2003-03-31 16:34:49 +000092int checkboard (void)
93{
wdenk85ec0bc2003-03-31 16:34:49 +000094 unsigned long chipid = *INCA_IP_WDT_CHIPID;
95 int part_num;
96
97 puts ("Board: INCA-IP ");
98 part_num = (chipid >> 12) & 0xffff;
99 switch (part_num) {
100 case 0xc0:
101 printf ("Standard Version, ");
102 break;
103 case 0xc1:
104 printf ("Basic Version, ");
105 break;
106 default:
107 printf ("Unknown Part Number 0x%x ", part_num);
108 break;
109 }
110
111 printf ("Chip V1.%ld, ", (chipid >> 28));
112
113 printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000);
114
Jean-Christophe PLAGNIOL-VILLARD5c150102007-11-13 09:11:05 +0100115 set_io_port_base(0);
116
wdenk85ec0bc2003-03-31 16:34:49 +0000117 return 0;
118}