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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dirk Eibachb46226b2014-07-03 09:28:18 +02002/*
3 * (C) Copyright 2013
Mario Sixd38826a2018-03-06 08:04:58 +01004 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
Dirk Eibachb46226b2014-07-03 09:28:18 +02005 */
6
7#include <common.h>
8#include <i2c.h>
Mario Six92164212018-01-15 11:08:11 +01009#include <dm.h>
Mario Six98e42492019-01-28 09:45:57 +010010#include <regmap.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060011#include <log.h>
Simon Glass401d1c42020-10-30 21:38:53 -060012#include <asm/global_data.h>
Mario Six64ef0942018-01-15 11:08:10 +010013#include <asm/unaligned.h>
Simon Glasscd93d622020-05-10 11:40:13 -060014#include <linux/bitops.h>
Simon Glassc05ed002020-05-10 11:40:11 -060015#include <linux/delay.h>
Dirk Eibachb46226b2014-07-03 09:28:18 +020016
Mario Six92164212018-01-15 11:08:11 +010017struct ihs_i2c_priv {
18 uint speed;
Mario Six98e42492019-01-28 09:45:57 +010019 struct regmap *map;
Mario Six92164212018-01-15 11:08:11 +010020};
21
Mario Six98e42492019-01-28 09:45:57 +010022struct ihs_i2c_regs {
23 u16 interrupt_status;
24 u16 interrupt_enable_control;
25 u16 write_mailbox_ext;
26 u16 write_mailbox;
27 u16 read_mailbox_ext;
28 u16 read_mailbox;
Mario Six92164212018-01-15 11:08:11 +010029};
30
Mario Six98e42492019-01-28 09:45:57 +010031#define ihs_i2c_set(map, member, val) \
32 regmap_set(map, struct ihs_i2c_regs, member, val)
33
34#define ihs_i2c_get(map, member, valp) \
35 regmap_get(map, struct ihs_i2c_regs, member, valp)
36
Dirk Eibachb46226b2014-07-03 09:28:18 +020037enum {
Mario Six64ef0942018-01-15 11:08:10 +010038 I2CINT_ERROR_EV = BIT(13),
39 I2CINT_TRANSMIT_EV = BIT(14),
40 I2CINT_RECEIVE_EV = BIT(15),
Dirk Eibachb46226b2014-07-03 09:28:18 +020041};
42
43enum {
Mario Six64ef0942018-01-15 11:08:10 +010044 I2CMB_READ = 0 << 10,
Dirk Eibachb46226b2014-07-03 09:28:18 +020045 I2CMB_WRITE = 1 << 10,
Mario Six64ef0942018-01-15 11:08:10 +010046 I2CMB_1BYTE = 0 << 11,
Dirk Eibachb46226b2014-07-03 09:28:18 +020047 I2CMB_2BYTE = 1 << 11,
Mario Six64ef0942018-01-15 11:08:10 +010048 I2CMB_DONT_HOLD_BUS = 0 << 13,
Dirk Eibachb46226b2014-07-03 09:28:18 +020049 I2CMB_HOLD_BUS = 1 << 13,
50 I2CMB_NATIVE = 2 << 14,
51};
52
Mario Six64ef0942018-01-15 11:08:10 +010053enum {
54 I2COP_WRITE = 0,
55 I2COP_READ = 1,
56};
57
Mario Six92164212018-01-15 11:08:11 +010058static int wait_for_int(struct udevice *dev, int read)
Dirk Eibachb46226b2014-07-03 09:28:18 +020059{
60 u16 val;
Mario Six64ef0942018-01-15 11:08:10 +010061 uint ctr = 0;
Mario Six92164212018-01-15 11:08:11 +010062 struct ihs_i2c_priv *priv = dev_get_priv(dev);
Mario Six92164212018-01-15 11:08:11 +010063
Mario Six98e42492019-01-28 09:45:57 +010064 ihs_i2c_get(priv->map, interrupt_status, &val);
Mario Six64ef0942018-01-15 11:08:10 +010065 /* Wait until error or receive/transmit interrupt was raised */
Dirk Eibachb46226b2014-07-03 09:28:18 +020066 while (!(val & (I2CINT_ERROR_EV
67 | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV)))) {
68 udelay(10);
Mario Six482c76e2019-01-28 09:45:58 +010069 if (ctr++ > 5000) {
70 debug("%s: timed out\n", __func__);
71 return -ETIMEDOUT;
72 }
Mario Six98e42492019-01-28 09:45:57 +010073 ihs_i2c_get(priv->map, interrupt_status, &val);
Dirk Eibachb46226b2014-07-03 09:28:18 +020074 }
75
Mario Six482c76e2019-01-28 09:45:58 +010076 return (val & I2CINT_ERROR_EV) ? -EIO : 0;
Dirk Eibachb46226b2014-07-03 09:28:18 +020077}
78
Mario Six92164212018-01-15 11:08:11 +010079static int ihs_i2c_transfer(struct udevice *dev, uchar chip,
80 uchar *buffer, int len, int read, bool is_last)
Dirk Eibachb46226b2014-07-03 09:28:18 +020081{
82 u16 val;
Mario Six2df71d62018-03-28 14:37:42 +020083 u16 data;
Mario Six482c76e2019-01-28 09:45:58 +010084 int res;
Mario Six92164212018-01-15 11:08:11 +010085 struct ihs_i2c_priv *priv = dev_get_priv(dev);
Dirk Eibachb46226b2014-07-03 09:28:18 +020086
Mario Six64ef0942018-01-15 11:08:10 +010087 /* Clear interrupt status */
Mario Six2df71d62018-03-28 14:37:42 +020088 data = I2CINT_ERROR_EV | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV;
Mario Six98e42492019-01-28 09:45:57 +010089 ihs_i2c_set(priv->map, interrupt_status, data);
90 ihs_i2c_get(priv->map, interrupt_status, &val);
Dirk Eibachb46226b2014-07-03 09:28:18 +020091
Mario Six64ef0942018-01-15 11:08:10 +010092 /* If we want to write and have data, write the bytes to the mailbox */
Dirk Eibachb46226b2014-07-03 09:28:18 +020093 if (!read && len) {
94 val = buffer[0];
95
96 if (len > 1)
97 val |= buffer[1] << 8;
Mario Six98e42492019-01-28 09:45:57 +010098 ihs_i2c_set(priv->map, write_mailbox_ext, val);
Dirk Eibachb46226b2014-07-03 09:28:18 +020099 }
100
Mario Six2df71d62018-03-28 14:37:42 +0200101 data = I2CMB_NATIVE
102 | (read ? 0 : I2CMB_WRITE)
103 | (chip << 1)
104 | ((len > 1) ? I2CMB_2BYTE : 0)
105 | (is_last ? 0 : I2CMB_HOLD_BUS);
106
Mario Six98e42492019-01-28 09:45:57 +0100107 ihs_i2c_set(priv->map, write_mailbox, data);
Dirk Eibachb46226b2014-07-03 09:28:18 +0200108
Mario Six482c76e2019-01-28 09:45:58 +0100109 res = wait_for_int(dev, read);
Mario Six482c76e2019-01-28 09:45:58 +0100110 if (res) {
111 if (res == -ETIMEDOUT)
112 debug("%s: time out while waiting for event\n", __func__);
113
114 return res;
115 }
Dirk Eibachb46226b2014-07-03 09:28:18 +0200116
Mario Six64ef0942018-01-15 11:08:10 +0100117 /* If we want to read, get the bytes from the mailbox */
Dirk Eibachb46226b2014-07-03 09:28:18 +0200118 if (read) {
Mario Six98e42492019-01-28 09:45:57 +0100119 ihs_i2c_get(priv->map, read_mailbox_ext, &val);
Dirk Eibachb46226b2014-07-03 09:28:18 +0200120 buffer[0] = val & 0xff;
121 if (len > 1)
122 buffer[1] = val >> 8;
123 }
124
125 return 0;
126}
127
Mario Six9cef9832018-01-15 11:08:12 +0100128static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int len, bool hold_bus, int read)
Mario Six9cef9832018-01-15 11:08:12 +0100129{
Mario Six482c76e2019-01-28 09:45:58 +0100130 int res;
131
Mario Six9cef9832018-01-15 11:08:12 +0100132 while (len) {
133 int transfer = min(len, 2);
134 bool is_last = len <= transfer;
135
Mario Six482c76e2019-01-28 09:45:58 +0100136 res = ihs_i2c_transfer(dev, chip, data, transfer, read,
137 hold_bus ? false : is_last);
Mario Six482c76e2019-01-28 09:45:58 +0100138 if (res)
139 return res;
Mario Six9cef9832018-01-15 11:08:12 +0100140
141 data += transfer;
142 len -= transfer;
143 }
144
145 return 0;
146}
147
Mario Six9cef9832018-01-15 11:08:12 +0100148static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen,
149 bool hold_bus)
Dirk Eibachb46226b2014-07-03 09:28:18 +0200150{
Mario Six9cef9832018-01-15 11:08:12 +0100151 return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus, I2COP_WRITE);
Dirk Eibachb46226b2014-07-03 09:28:18 +0200152}
153
Mario Six92164212018-01-15 11:08:11 +0100154static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr,
155 int alen, uchar *buffer, int len, int read)
Dirk Eibachb46226b2014-07-03 09:28:18 +0200156{
Mario Six482c76e2019-01-28 09:45:58 +0100157 int res;
158
Mario Six64ef0942018-01-15 11:08:10 +0100159 /* Don't hold the bus if length of data to send/receive is zero */
Mario Six482c76e2019-01-28 09:45:58 +0100160 if (len <= 0)
161 return -EINVAL;
162
Mario Six482c76e2019-01-28 09:45:58 +0100163 res = ihs_i2c_address(dev, chip, addr, alen, len);
Mario Six482c76e2019-01-28 09:45:58 +0100164 if (res)
165 return res;
Dirk Eibachb46226b2014-07-03 09:28:18 +0200166
Mario Six9cef9832018-01-15 11:08:12 +0100167 return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read);
Dirk Eibachb46226b2014-07-03 09:28:18 +0200168}
169
Mario Six92164212018-01-15 11:08:11 +0100170int ihs_i2c_probe(struct udevice *bus)
171{
172 struct ihs_i2c_priv *priv = dev_get_priv(bus);
Mario Six92164212018-01-15 11:08:11 +0100173
Mario Six98e42492019-01-28 09:45:57 +0100174 regmap_init_mem(dev_ofnode(bus), &priv->map);
Mario Six92164212018-01-15 11:08:11 +0100175
176 return 0;
177}
178
179static int ihs_i2c_set_bus_speed(struct udevice *bus, uint speed)
180{
181 struct ihs_i2c_priv *priv = dev_get_priv(bus);
182
183 if (speed != priv->speed && priv->speed != 0)
Mario Six482c76e2019-01-28 09:45:58 +0100184 return -EINVAL;
Mario Six92164212018-01-15 11:08:11 +0100185
186 priv->speed = speed;
187
188 return 0;
189}
190
191static int ihs_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
192{
193 struct i2c_msg *dmsg, *omsg, dummy;
194
195 memset(&dummy, 0, sizeof(struct i2c_msg));
196
197 /* We expect either two messages (one with an offset and one with the
198 * actucal data) or one message (just data)
199 */
200 if (nmsgs > 2 || nmsgs == 0) {
Mario Six482c76e2019-01-28 09:45:58 +0100201 debug("%s: Only one or two messages are supported\n", __func__);
202 return -ENOTSUPP;
Mario Six92164212018-01-15 11:08:11 +0100203 }
204
205 omsg = nmsgs == 1 ? &dummy : msg;
206 dmsg = nmsgs == 1 ? msg : msg + 1;
207
208 if (dmsg->flags & I2C_M_RD)
209 return ihs_i2c_access(bus, dmsg->addr, omsg->buf,
210 omsg->len, dmsg->buf, dmsg->len,
211 I2COP_READ);
212 else
213 return ihs_i2c_access(bus, dmsg->addr, omsg->buf,
214 omsg->len, dmsg->buf, dmsg->len,
215 I2COP_WRITE);
216}
217
218static int ihs_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
219 u32 chip_flags)
220{
221 uchar buffer[2];
Mario Six482c76e2019-01-28 09:45:58 +0100222 int res;
Mario Six92164212018-01-15 11:08:11 +0100223
Mario Six482c76e2019-01-28 09:45:58 +0100224 res = ihs_i2c_transfer(bus, chip_addr, buffer, 0, I2COP_READ, true);
225 if (res)
226 return res;
Mario Six92164212018-01-15 11:08:11 +0100227
228 return 0;
229}
230
231static const struct dm_i2c_ops ihs_i2c_ops = {
232 .xfer = ihs_i2c_xfer,
233 .probe_chip = ihs_i2c_probe_chip,
234 .set_bus_speed = ihs_i2c_set_bus_speed,
235};
236
237static const struct udevice_id ihs_i2c_ids[] = {
238 { .compatible = "gdsys,ihs_i2cmaster", },
239 { /* sentinel */ }
240};
241
242U_BOOT_DRIVER(i2c_ihs) = {
243 .name = "i2c_ihs",
244 .id = UCLASS_I2C,
245 .of_match = ihs_i2c_ids,
246 .probe = ihs_i2c_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700247 .priv_auto = sizeof(struct ihs_i2c_priv),
Mario Six92164212018-01-15 11:08:11 +0100248 .ops = &ihs_i2c_ops,
249};