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Simon Glass74749f12019-12-06 21:42:53 -07001#
2# Intel PINCTRL drivers
3#
4
5if PINCTRL_INTEL
6
7config INTEL_PINCTRL_DUAL_ROUTE_SUPPORT
Simon Glass0a6f3332019-12-08 17:32:08 -07008 bool
9 default y
Simon Glass74749f12019-12-06 21:42:53 -070010
11config INTEL_PINCTRL_PADCFG_PADTOL
Simon Glass0a6f3332019-12-08 17:32:08 -070012 bool n
Simon Glass74749f12019-12-06 21:42:53 -070013
14config INTEL_PINCTRL_IOSTANDBY
Simon Glass0a6f3332019-12-08 17:32:08 -070015 bool
16 default y
17
Simon Glassa9331a32020-07-07 21:32:21 -060018config INTEL_PINCTRL_MULTI_ACPI_DEVICES
19 bool
20 default y
21 help
22 Enable this if the pinctrl devices are modelled as multiple,
23 separate ACPI devices in the ACPI tables. If enabled, the ACPI
24 devices match the U-Boot pinctrl devices and the pin 'offset' is
Simon Glass0a0cdec2020-08-29 15:23:06 -060025 relative to a particular pinctrl device. If disabled, there is a
Simon Glassa9331a32020-07-07 21:32:21 -060026 single ACPI pinctrl device which includes all U-Boot pinctrl devices
27 and the pin 'offset' is in effect a global pin number.
28
29
Simon Glass0a6f3332019-12-08 17:32:08 -070030config PINCTRL_INTEL_APL
31 bool "Support Intel Apollo Lake (APL)"
32 help
33 Add support for Intel Apollo Lake pin-control and pin-mux settings.
34 These are mostly read from the device tree, with the early-pads
35 property in the host bridge and the pads property in the fsp-s
36 subnode of the host bridge.
Simon Glass74749f12019-12-06 21:42:53 -070037
38endif