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Stefano Babiceae49882011-01-20 08:05:15 +00001/*
2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7 *
8 * Configuration for the MX35pdk Freescale board.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Stefano Babiceae49882011-01-20 08:05:15 +000011 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <asm/arch/imx-regs.h>
17
18 /* High Level Configuration Options */
Stefano Babiceae49882011-01-20 08:05:15 +000019#define CONFIG_MX35
Stefano Babiceae49882011-01-20 08:05:15 +000020
Gong Qianyu18fb0e32015-10-26 19:47:42 +080021#define CONFIG_SYS_FSL_CLK
Stefano Babiceae49882011-01-20 08:05:15 +000022
23/* Set TEXT at the beginning of the NOR flash */
Stefano Babiceae49882011-01-20 08:05:15 +000024
Stefano Babiceae49882011-01-20 08:05:15 +000025#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
26#define CONFIG_REVISION_TAG
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29
30/*
31 * Size of malloc() pool
32 */
33#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
34
35/*
36 * Hardware drivers
37 */
tremb089d032013-09-21 18:13:36 +020038#define CONFIG_SYS_I2C
39#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020040#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
41#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070042#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Stefano Babiceae49882011-01-20 08:05:15 +000043
Stefano Babiceae49882011-01-20 08:05:15 +000044/*
45 * PMIC Configs
46 */
Łukasz Majewskibe3b51a2012-11-13 03:22:14 +000047#define CONFIG_POWER
48#define CONFIG_POWER_I2C
49#define CONFIG_POWER_FSL
Simon Glass913702c2014-05-20 06:01:34 -060050#define CONFIG_POWER_FSL_MC13892
Stefano Babiceae49882011-01-20 08:05:15 +000051#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
Fabio Estevamd28d6a92011-10-25 01:35:37 +000052#define CONFIG_RTC_MC13XXX
Stefano Babiceae49882011-01-20 08:05:15 +000053
54/*
55 * MFD MC9SDZ60
56 */
57#define CONFIG_FSL_MC9SDZ60
58#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
59
60/*
61 * UART (console)
62 */
63#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010064#define CONFIG_MXC_UART_BASE UART1_BASE
Stefano Babiceae49882011-01-20 08:05:15 +000065
66/* allow to overwrite serial and ethaddr */
67#define CONFIG_ENV_OVERWRITE
Stefano Babiceae49882011-01-20 08:05:15 +000068
69/*
70 * Command definition
71 */
Stefano Babiceae49882011-01-20 08:05:15 +000072
Stefano Babiceae49882011-01-20 08:05:15 +000073#define CONFIG_NET_RETRY_COUNT 100
74
Stefano Babiceae49882011-01-20 08:05:15 +000075
76#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
77
78/*
79 * Ethernet on the debug board (SMC911)
80 */
Stefano Babiceae49882011-01-20 08:05:15 +000081#define CONFIG_HAS_ETH1
Stefano Babiceae49882011-01-20 08:05:15 +000082#define CONFIG_ETHPRIME
83
84/*
85 * Ethernet on SOC (FEC)
86 */
87#define CONFIG_FEC_MXC
88#define IMX_FEC_BASE FEC_BASE_ADDR
89#define CONFIG_FEC_MXC_PHYADDR 0x1F
90
91#define CONFIG_MII
Stefano Babiceae49882011-01-20 08:05:15 +000092
93#define CONFIG_ARP_TIMEOUT 200UL
94
95/*
96 * Miscellaneous configurable options
97 */
Stefano Babiceae49882011-01-20 08:05:15 +000098
99#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
100#define CONFIG_SYS_MEMTEST_END 0x10000
101
Stefano Babiceae49882011-01-20 08:05:15 +0000102#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
103
Stefano Babiceae49882011-01-20 08:05:15 +0000104/*
105 * Physical Memory Map
106 */
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200107#define CONFIG_NR_DRAM_BANKS 2
Stefano Babiceae49882011-01-20 08:05:15 +0000108#define PHYS_SDRAM_1 CSD0_BASE_ADDR
109#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200110#define PHYS_SDRAM_2 CSD1_BASE_ADDR
111#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
Stefano Babiceae49882011-01-20 08:05:15 +0000112
113#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
114#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
115#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
116#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
117 GENERATED_GBL_DATA_SIZE)
118#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
119 CONFIG_SYS_GBL_DATA_OFFSET)
120
121/*
122 * MTD Command for mtdparts
123 */
Stefano Babiceae49882011-01-20 08:05:15 +0000124#define CONFIG_MTD_DEVICE
125#define CONFIG_FLASH_CFI_MTD
126#define CONFIG_MTD_PARTITIONS
Stefano Babiceae49882011-01-20 08:05:15 +0000127
128/*
129 * FLASH and environment organization
130 */
131#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
132#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
133#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
134/* Monitor at beginning of flash */
135#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
136#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
137
138#define CONFIG_ENV_SECT_SIZE (128 * 1024)
139#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
140
141/* Address and size of Redundant Environment Sector */
142#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
143#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
144
145#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
146 CONFIG_SYS_MONITOR_LEN)
147
Stefano Babiceae49882011-01-20 08:05:15 +0000148#if defined(CONFIG_FSL_ENV_IN_NAND)
Stefano Babiceae49882011-01-20 08:05:15 +0000149 #define CONFIG_ENV_OFFSET (1024 * 1024)
150#endif
151
152/*
153 * CFI FLASH driver setup
154 */
155#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
156#define CONFIG_FLASH_CFI_DRIVER
157
158/* A non-standard buffered write algorithm */
159#define CONFIG_FLASH_SPANSION_S29WS_N
160#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
161#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
162
163/*
164 * NAND FLASH driver setup
165 */
Stefano Babiceae49882011-01-20 08:05:15 +0000166#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
167#define CONFIG_SYS_MAX_NAND_DEVICE 1
168#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
169#define CONFIG_MXC_NAND_HWECC
170#define CONFIG_SYS_NAND_LARGEPAGE
171
Benoît Thébaudeau961a7622012-11-13 09:58:25 +0000172/* EHCI driver */
Benoît Thébaudeau961a7622012-11-13 09:58:25 +0000173#define CONFIG_EHCI_IS_TDI
174#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
175#define CONFIG_USB_EHCI_MXC
176#define CONFIG_MXC_USB_PORT 0
177#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
178 MXC_EHCI_POWER_PINS_ENABLED | \
179 MXC_EHCI_OC_PIN_ACTIVE_LOW)
180#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
181
Stefano Babic32925392012-09-05 21:47:42 +0000182/* mmc driver */
Stefano Babic32925392012-09-05 21:47:42 +0000183#define CONFIG_SYS_FSL_ESDHC_ADDR 0
184#define CONFIG_SYS_FSL_ESDHC_NUM 1
185
Stefano Babiceae49882011-01-20 08:05:15 +0000186/*
187 * Default environment and default scripts
188 * to update uboot and load kernel
189 */
Stefano Babiceae49882011-01-20 08:05:15 +0000190
191#define CONFIG_HOSTNAME "mx35pdk"
192#define CONFIG_EXTRA_ENV_SETTINGS \
193 "netdev=eth1\0" \
194 "ethprime=smc911x\0" \
195 "nfsargs=setenv bootargs root=/dev/nfs rw " \
196 "nfsroot=${serverip}:${rootpath}\0" \
197 "ramargs=setenv bootargs root=/dev/ram rw\0" \
198 "addip_sta=setenv bootargs ${bootargs} " \
199 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
200 ":${hostname}:${netdev}:off panic=1\0" \
201 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
202 "addip=if test -n ${ipdyn};then run addip_dyn;" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200203 "else run addip_sta;fi\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000204 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
205 "addtty=setenv bootargs ${bootargs}" \
206 " console=ttymxc0,${baudrate}\0" \
207 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
208 "loadaddr=80800000\0" \
209 "kernel_addr_r=80800000\0" \
Mario Six5bc05432018-03-28 14:38:20 +0200210 "hostname=" CONFIG_HOSTNAME "\0" \
211 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
212 "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000213 "flash_self=run ramargs addip addtty addmtd addmisc;" \
214 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
215 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
216 "bootm ${kernel_addr}\0" \
217 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
218 "run nfsargs addip addtty addmtd addmisc;" \
219 "bootm ${kernel_addr_r}\0" \
220 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
221 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
Mario Six5bc05432018-03-28 14:38:20 +0200222 "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000223 "load=tftp ${loadaddr} ${u-boot}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200224 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
Stefano Babic32925392012-09-05 21:47:42 +0000225 "update=protect off ${uboot_addr} +80000;" \
226 "erase ${uboot_addr} +80000;" \
Stefano Babiceae49882011-01-20 08:05:15 +0000227 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
228 "upd=if run load;then echo Updating u-boot;if run update;" \
229 "then echo U-Boot updated;" \
230 "else echo Error updating u-boot !;" \
231 "echo Board without bootloader !!;" \
232 "fi;" \
233 "else echo U-Boot not downloaded..exiting;fi\0" \
234 "bootcmd=run net_nfs\0"
235
236#endif /* __CONFIG_H */