Lokesh Vutla | ea8ad1d | 2018-08-27 15:59:08 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "k3-am654.dtsi" |
Faiz Abbas | 3a1a0df | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 9 | #include <dt-bindings/pinctrl/k3.h> |
Lokesh Vutla | ea8ad1d | 2018-08-27 15:59:08 +0530 | [diff] [blame] | 10 | |
| 11 | / { |
| 12 | compatible = "ti,am654-evm", "ti,am654"; |
| 13 | model = "Texas Instruments AM654 Base Board"; |
| 14 | |
| 15 | chosen { |
| 16 | stdout-path = "serial2:115200n8"; |
| 17 | bootargs = "earlycon=ns16550a,mmio32,0x02800000"; |
| 18 | }; |
| 19 | |
Suman Anna | 35f21c3 | 2019-09-04 16:01:41 +0530 | [diff] [blame] | 20 | aliases { |
| 21 | remoteproc0 = &mcu_r5fss0_core0; |
| 22 | remoteproc1 = &mcu_r5fss0_core1; |
| 23 | }; |
| 24 | |
Lokesh Vutla | ea8ad1d | 2018-08-27 15:59:08 +0530 | [diff] [blame] | 25 | memory@80000000 { |
| 26 | device_type = "memory"; |
| 27 | /* 4G RAM */ |
| 28 | reg = <0x00000000 0x80000000 0x00000000 0x80000000>, |
| 29 | <0x00000008 0x80000000 0x00000000 0x80000000>; |
| 30 | }; |
| 31 | |
| 32 | reserved-memory { |
| 33 | #address-cells = <2>; |
| 34 | #size-cells = <2>; |
| 35 | ranges; |
| 36 | secure_ddr: secure_ddr@9e800000 { |
| 37 | reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ |
| 38 | alignment = <0x1000>; |
| 39 | no-map; |
| 40 | }; |
| 41 | }; |
| 42 | }; |
Faiz Abbas | 3a1a0df | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 43 | |
| 44 | &main_pmx0 { |
| 45 | main_mmc0_pins_default: main_mmc0_pins_default { |
| 46 | pinctrl-single,pins = < |
| 47 | AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ |
| 48 | AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ |
| 49 | AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ |
| 50 | AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ |
| 51 | AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ |
| 52 | AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ |
| 53 | AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ |
| 54 | AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ |
| 55 | AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ |
| 56 | AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ |
| 57 | AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ |
| 58 | AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ |
| 59 | >; |
| 60 | }; |
Vignesh Raghavendra | 6012007 | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 61 | |
| 62 | usb1_pins_default: usb1_pins_default { |
| 63 | pinctrl-single,pins = < |
| 64 | AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ |
| 65 | >; |
| 66 | }; |
Vignesh Raghavendra | 360c86b | 2020-02-17 13:22:55 +0530 | [diff] [blame] | 67 | |
| 68 | main_i2c2_pins_default: main-i2c2-pins-default { |
| 69 | pinctrl-single,pins = < |
| 70 | AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ |
| 71 | AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ |
| 72 | >; |
| 73 | }; |
| 74 | }; |
| 75 | |
| 76 | &main_pmx1 { |
| 77 | main_i2c0_pins_default: main-i2c0-pins-default { |
| 78 | pinctrl-single,pins = < |
| 79 | AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ |
| 80 | AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ |
| 81 | >; |
| 82 | }; |
| 83 | |
| 84 | main_i2c1_pins_default: main-i2c1-pins-default { |
| 85 | pinctrl-single,pins = < |
| 86 | AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ |
| 87 | AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ |
| 88 | >; |
| 89 | }; |
Faiz Abbas | 3a1a0df | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 90 | }; |
| 91 | |
Andreas Dannenberg | 7e0363b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 92 | &wkup_pmx0 { |
| 93 | wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
| 94 | pinctrl-single,pins = < |
| 95 | AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ |
| 96 | AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ |
| 97 | >; |
| 98 | }; |
Vignesh Raghavendra | 9e9dfc1 | 2020-02-04 11:09:51 +0530 | [diff] [blame] | 99 | |
| 100 | mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default { |
| 101 | pinctrl-single,pins = < |
| 102 | AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ |
| 103 | AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ |
| 104 | AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ |
| 105 | AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ |
| 106 | AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ |
| 107 | AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ |
| 108 | AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ |
| 109 | AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ |
| 110 | AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ |
| 111 | AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ |
| 112 | AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ |
| 113 | >; |
| 114 | }; |
Andreas Dannenberg | 7e0363b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 115 | }; |
| 116 | |
Faiz Abbas | 3a1a0df | 2019-06-11 00:43:31 +0530 | [diff] [blame] | 117 | &sdhci0 { |
| 118 | pinctrl-names = "default"; |
| 119 | pinctrl-0 = <&main_mmc0_pins_default>; |
| 120 | bus-width = <8>; |
| 121 | non-removable; |
| 122 | ti,driver-strength-ohm = <50>; |
| 123 | }; |
Andreas Dannenberg | 7e0363b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 124 | |
| 125 | &wkup_i2c0 { |
| 126 | pinctrl-names = "default"; |
| 127 | pinctrl-0 = <&wkup_i2c0_pins_default>; |
| 128 | clock-frequency = <400000>; |
Andreas Dannenberg | ba7907c | 2019-06-04 18:08:18 -0500 | [diff] [blame] | 129 | |
| 130 | tca9554: gpio@38 { |
| 131 | compatible = "nxp,pca9554"; |
| 132 | reg = <0x38>; |
| 133 | gpio-controller; |
| 134 | #gpio-cells = <2>; |
| 135 | }; |
Andreas Dannenberg | 7e0363b | 2019-06-04 18:08:15 -0500 | [diff] [blame] | 136 | }; |
Vignesh Raghavendra | 6012007 | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 137 | |
Vignesh Raghavendra | 360c86b | 2020-02-17 13:22:55 +0530 | [diff] [blame] | 138 | &main_i2c0 { |
| 139 | pinctrl-names = "default"; |
| 140 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 141 | clock-frequency = <400000>; |
| 142 | |
| 143 | pca9555: gpio@21 { |
| 144 | compatible = "nxp,pca9555"; |
| 145 | reg = <0x21>; |
| 146 | gpio-controller; |
| 147 | #gpio-cells = <2>; |
| 148 | }; |
| 149 | }; |
| 150 | |
| 151 | &main_i2c1 { |
| 152 | pinctrl-names = "default"; |
| 153 | pinctrl-0 = <&main_i2c1_pins_default>; |
| 154 | clock-frequency = <400000>; |
| 155 | }; |
| 156 | |
| 157 | &main_i2c2 { |
| 158 | pinctrl-names = "default"; |
| 159 | pinctrl-0 = <&main_i2c2_pins_default>; |
| 160 | clock-frequency = <400000>; |
| 161 | }; |
| 162 | |
Vignesh Raghavendra | 6012007 | 2019-12-09 10:37:33 +0530 | [diff] [blame] | 163 | &dwc3_1 { |
| 164 | status = "okay"; |
| 165 | }; |
| 166 | |
| 167 | &usb1_phy { |
| 168 | status = "okay"; |
| 169 | }; |
| 170 | |
| 171 | &usb1 { |
| 172 | pinctrl-names = "default"; |
| 173 | pinctrl-0 = <&usb1_pins_default>; |
| 174 | dr_mode = "otg"; |
| 175 | }; |
| 176 | |
| 177 | &dwc3_0 { |
| 178 | status = "disabled"; |
| 179 | }; |
| 180 | |
| 181 | &usb0_phy { |
| 182 | status = "disabled"; |
| 183 | }; |
Vignesh Raghavendra | 9e9dfc1 | 2020-02-04 11:09:51 +0530 | [diff] [blame] | 184 | |
| 185 | &ospi0 { |
| 186 | pinctrl-names = "default"; |
| 187 | pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; |
| 188 | |
| 189 | flash@0{ |
| 190 | compatible = "jedec,spi-nor"; |
| 191 | reg = <0x0>; |
| 192 | spi-tx-bus-width = <1>; |
| 193 | spi-rx-bus-width = <8>; |
Vignesh Raghavendra | d5a1f4f | 2020-04-02 18:59:12 +0530 | [diff] [blame] | 194 | spi-max-frequency = <50000000>; |
Vignesh Raghavendra | 9e9dfc1 | 2020-02-04 11:09:51 +0530 | [diff] [blame] | 195 | cdns,tshsl-ns = <60>; |
| 196 | cdns,tsd2d-ns = <60>; |
| 197 | cdns,tchsh-ns = <60>; |
| 198 | cdns,tslch-ns = <60>; |
| 199 | cdns,read-delay = <0>; |
| 200 | #address-cells = <1>; |
| 201 | #size-cells = <1>; |
| 202 | }; |
| 203 | }; |