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wdenkda27dcf2002-09-10 19:19:06 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Rolf Offermanns <rof@sysgo.de>
5 *
6 * Configuation settings for the SSV DNP1110 board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
31 * If we are developing, we might want to start armboot from ram
32 * so we MUST NOT initialize critical regs like mem-timing ...
33 */
wdenk8aa1a2d2005-04-04 12:44:11 +000034#define CONFIG_SKIP_LOWLEVEL_INIT 1
35#undef CONFIG_SKIP_RELOCATE_UBOOT
wdenkda27dcf2002-09-10 19:19:06 +000036
37/*
38 * High Level Configuration Options
39 * (easy to change)
40 */
41#define CONFIG_SA1110 1 /* This is an SA1110 CPU */
42#define CONFIG_DNP1110 1 /* on an DNP/1110 Board */
43
44#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45
46/*
47 * Size of malloc() pool
48 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
50#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
wdenkda27dcf2002-09-10 19:19:06 +000051
52/*
53 * Hardware drivers
54 */
55#define CONFIG_DRIVER_SMC91111
56#define CONFIG_SMC91111_BASE 0x20000300
57
58
59/*
60 * select serial console configuration
61 */
Jean-Christophe PLAGNIOL-VILLARD412ab702009-03-29 23:01:41 +020062#define CONFIG_SA1100_SERIAL
wdenkda27dcf2002-09-10 19:19:06 +000063#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
64
65/* allow to overwrite serial and ethaddr */
66#define CONFIG_ENV_OVERWRITE
67
68#define CONFIG_BAUDRATE 115200
69
wdenkda27dcf2002-09-10 19:19:06 +000070
Jon Loeligerab999ba2007-07-04 22:32:03 -050071/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -050072 * BOOTP options
73 */
74#define CONFIG_BOOTP_BOOTFILESIZE
75#define CONFIG_BOOTP_BOOTPATH
76#define CONFIG_BOOTP_GATEWAY
77#define CONFIG_BOOTP_HOSTNAME
78
79
80/*
Jon Loeligerab999ba2007-07-04 22:32:03 -050081 * Command line configuration.
82 */
83#include <config_cmd_default.h>
84
wdenkda27dcf2002-09-10 19:19:06 +000085
86#define CONFIG_BOOTDELAY 3
Wolfgang Denk53677ef2008-05-20 16:00:29 +020087#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
wdenkda27dcf2002-09-10 19:19:06 +000088#define CONFIG_ETHADDR 02:80:ad:20:31:b8
89#define CONFIG_NETMASK 255.255.0.0
90#define CONFIG_IPADDR 172.22.2.23
91#define CONFIG_SERVERIP 172.22.2.22
wdenkdc7c9a12003-03-26 06:55:25 +000092#define CONFIG_BOOTFILE "dnp1110"
wdenkda27dcf2002-09-10 19:19:06 +000093#define CONFIG_BOOTCOMMAND "tftp; bootm"
94
Jon Loeligerab999ba2007-07-04 22:32:03 -050095#if defined(CONFIG_CMD_KGDB)
wdenkda27dcf2002-09-10 19:19:06 +000096#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
97#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
98#endif
99
100/*
101 * Miscellaneous configurable options
102 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200103#define CONFIG_SYS_LONGHELP /* undef to save memory */
104#define CONFIG_SYS_PROMPT "DNP1110 # " /* Monitor Command Prompt */
105#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
106#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
107#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
108#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkda27dcf2002-09-10 19:19:06 +0000109
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
111#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
wdenkda27dcf2002-09-10 19:19:06 +0000112
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113#define CONFIG_SYS_LOAD_ADDR 0xc0200000 /* default load address */
wdenkda27dcf2002-09-10 19:19:06 +0000114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
116#define CONFIG_SYS_CPUSPEED 0x0b /* set core clock to 220 MHz */
wdenkda27dcf2002-09-10 19:19:06 +0000117
118 /* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenkda27dcf2002-09-10 19:19:06 +0000120
121/*-----------------------------------------------------------------------
122 * Stack sizes
123 *
124 * The stack sizes are set up in start.S using the settings below
125 */
126#define CONFIG_STACKSIZE (128*1024) /* regular stack */
127#ifdef CONFIG_USE_IRQ
128#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
129#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
130#endif
131
132/*-----------------------------------------------------------------------
133 * Physical Memory Map
134 */
135#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
136#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
137#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
138
139
140#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
141#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
wdenkdc7c9a12003-03-26 06:55:25 +0000142#define PHYS_FLASH_BANK_SIZE 0x01000000 /* 32 MB Banks */
143#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
wdenkda27dcf2002-09-10 19:19:06 +0000144
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenkda27dcf2002-09-10 19:19:06 +0000146
147/*-----------------------------------------------------------------------
148 * FLASH and environment organization
149 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
151#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenkda27dcf2002-09-10 19:19:06 +0000152
153/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
155#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenkda27dcf2002-09-10 19:19:06 +0000156
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200157#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200158#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xF80000) /* Addr of Environment Sector */
159#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
wdenkda27dcf2002-09-10 19:19:06 +0000160
161#endif /* __CONFIG_H */