blob: 699e2090449c586dfcabbf3303710809d60ec4a6 [file] [log] [blame]
Adam Ford8e958832020-12-11 06:01:46 -06001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6#ifndef __IMX8MN_BEACON_H
7#define __IMX8MN_BEACON_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
Tom Rini65cc0e22022-11-16 13:10:41 -050012#define CFG_SYS_UBOOT_BASE \
Adam Ford8e958832020-12-11 06:01:46 -060013 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
14
Adam Ford8e958832020-12-11 06:01:46 -060015/* Link Definitions */
Adam Ford8e958832020-12-11 06:01:46 -060016
Tom Rini65cc0e22022-11-16 13:10:41 -050017#define CFG_SYS_INIT_RAM_ADDR 0x40000000
18#define CFG_SYS_INIT_RAM_SIZE 0x200000
Adam Ford8e958832020-12-11 06:01:46 -060019
Tom Riniaa6e94d2022-11-16 13:10:37 -050020#define CFG_SYS_SDRAM_BASE 0x40000000
Adam Ford8e958832020-12-11 06:01:46 -060021#define PHYS_SDRAM 0x40000000
Simon Glassdec5f3c2023-02-05 15:40:10 -070022#if IS_ENABLED(CONFIG_IMX8MN_BEACON_2GB_LPDDR)
Adam Ford5d9b1662021-02-16 08:19:52 -060023#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
24#else
Adam Ford8e958832020-12-11 06:01:46 -060025#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
Adam Ford5d9b1662021-02-16 08:19:52 -060026#endif
Adam Ford8e958832020-12-11 06:01:46 -060027
Adam Ford8e958832020-12-11 06:01:46 -060028#endif