Lukasz Majewski | 87e460c | 2019-06-24 15:50:50 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019 |
| 4 | * Lukasz Majewski, DENX Software Engineering, lukma@denx.de |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk.h> |
| 9 | #include <dm.h> |
| 10 | #include <asm/clk.h> |
| 11 | #include <dm/test.h> |
| 12 | #include <dm/uclass.h> |
| 13 | #include <linux/err.h> |
Simon Glass | 0e1fad4 | 2020-07-19 10:15:37 -0600 | [diff] [blame] | 14 | #include <test/test.h> |
Lukasz Majewski | 87e460c | 2019-06-24 15:50:50 +0200 | [diff] [blame] | 15 | #include <test/ut.h> |
| 16 | #include <sandbox-clk.h> |
| 17 | |
| 18 | /* Tests for Common Clock Framework driver */ |
| 19 | static int dm_test_clk_ccf(struct unit_test_state *uts) |
| 20 | { |
| 21 | struct clk *clk, *pclk; |
| 22 | struct udevice *dev; |
| 23 | long long rate; |
| 24 | int ret; |
| 25 | |
| 26 | /* Get the device using the clk device */ |
| 27 | ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-ccf", &dev)); |
| 28 | |
| 29 | /* Test for clk_get_by_id() */ |
| 30 | ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk); |
| 31 | ut_assertok(ret); |
| 32 | ut_asserteq_str("ecspi_root", clk->dev->name); |
| 33 | |
| 34 | /* Test for clk_get_parent_rate() */ |
| 35 | ret = clk_get_by_id(SANDBOX_CLK_ECSPI1, &clk); |
| 36 | ut_assertok(ret); |
| 37 | ut_asserteq_str("ecspi1", clk->dev->name); |
| 38 | |
| 39 | rate = clk_get_parent_rate(clk); |
| 40 | ut_asserteq(rate, 20000000); |
| 41 | |
| 42 | /* Test the mux of CCF */ |
| 43 | ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk); |
| 44 | ut_assertok(ret); |
| 45 | ut_asserteq_str("usdhc1_sel", clk->dev->name); |
| 46 | |
| 47 | rate = clk_get_parent_rate(clk); |
| 48 | ut_asserteq(rate, 60000000); |
| 49 | |
| 50 | ret = clk_get_by_id(SANDBOX_CLK_USDHC2_SEL, &clk); |
| 51 | ut_assertok(ret); |
| 52 | ut_asserteq_str("usdhc2_sel", clk->dev->name); |
| 53 | |
| 54 | rate = clk_get_parent_rate(clk); |
| 55 | ut_asserteq(rate, 80000000); |
| 56 | |
| 57 | pclk = clk_get_parent(clk); |
| 58 | ut_asserteq_str("pll3_80m", pclk->dev->name); |
| 59 | |
Peng Fan | 4f89598 | 2019-07-31 07:02:05 +0000 | [diff] [blame] | 60 | /* Test the composite of CCF */ |
| 61 | ret = clk_get_by_id(SANDBOX_CLK_I2C, &clk); |
| 62 | ut_assertok(ret); |
| 63 | ut_asserteq_str("i2c", clk->dev->name); |
| 64 | |
| 65 | rate = clk_get_rate(clk); |
| 66 | ut_asserteq(rate, 60000000); |
| 67 | |
Peng Fan | c66f4f5 | 2019-08-21 13:35:19 +0000 | [diff] [blame] | 68 | #if CONFIG_IS_ENABLED(CLK_CCF) |
| 69 | /* Test clk tree enable/disable */ |
| 70 | ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk); |
| 71 | ut_assertok(ret); |
| 72 | ut_asserteq_str("i2c_root", clk->dev->name); |
| 73 | |
| 74 | ret = clk_enable(clk); |
| 75 | ut_assertok(ret); |
| 76 | |
| 77 | ret = sandbox_clk_enable_count(clk); |
| 78 | ut_asserteq(ret, 1); |
| 79 | |
| 80 | ret = clk_get_by_id(SANDBOX_CLK_I2C, &pclk); |
| 81 | ut_assertok(ret); |
| 82 | |
| 83 | ret = sandbox_clk_enable_count(pclk); |
| 84 | ut_asserteq(ret, 1); |
| 85 | |
| 86 | ret = clk_disable(clk); |
| 87 | ut_assertok(ret); |
| 88 | |
| 89 | ret = sandbox_clk_enable_count(clk); |
| 90 | ut_asserteq(ret, 0); |
| 91 | |
| 92 | ret = sandbox_clk_enable_count(pclk); |
| 93 | ut_asserteq(ret, 0); |
| 94 | #endif |
| 95 | |
Lukasz Majewski | 87e460c | 2019-06-24 15:50:50 +0200 | [diff] [blame] | 96 | return 1; |
| 97 | } |
| 98 | |
Simon Glass | e180c2b | 2020-07-28 19:41:12 -0600 | [diff] [blame] | 99 | DM_TEST(dm_test_clk_ccf, UT_TESTF_SCAN_FDT); |