blob: c398a743f7b02cd1b0db55a59ab3bce98d778ce5 [file] [log] [blame]
Martyn Welchc8f34022022-10-25 10:55:02 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 */
5
6#include "imx8mp-u-boot.dtsi"
7
8/ {
9 model = "MSC SM2S-IMX8MPLUS";
10 compatible = "avnet,sm2s-imx8mp", "fsl,imx8mp";
11
12 wdt-reboot {
13 compatible = "wdt-reboot";
14 wdt = <&wdog1>;
Simon Glass8c103c32023-02-13 08:56:33 -070015 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010016 };
17};
18
19&reg_usdhc2_vmmc {
Simon Glass8c103c32023-02-13 08:56:33 -070020 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010021};
22
23&gpio1 {
Simon Glass8c103c32023-02-13 08:56:33 -070024 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010025};
26
27&gpio2 {
Simon Glass8c103c32023-02-13 08:56:33 -070028 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010029};
30
31&gpio3 {
Simon Glass8c103c32023-02-13 08:56:33 -070032 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010033};
34
35&i2c1 {
Simon Glass8c103c32023-02-13 08:56:33 -070036 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010037};
38
39&i2c2 {
Simon Glass8c103c32023-02-13 08:56:33 -070040 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010041};
42
43&i2c3 {
Simon Glass8c103c32023-02-13 08:56:33 -070044 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010045};
46
47&i2c4 {
Simon Glass8c103c32023-02-13 08:56:33 -070048 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010049};
50
51&i2c5 {
Simon Glass8c103c32023-02-13 08:56:33 -070052 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010053};
54
55&i2c6 {
Simon Glass8c103c32023-02-13 08:56:33 -070056 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010057};
58
59&pinctrl_i2c6 {
Simon Glass8c103c32023-02-13 08:56:33 -070060 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010061};
62
63&pmic {
Simon Glass8c103c32023-02-13 08:56:33 -070064 bootph-pre-ram;
Martyn Welchc8f34022022-10-25 10:55:02 +010065};