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Sergey Kubushync74b2102007-08-10 20:26:18 +02001/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02004 * SPDX-License-Identifier: GPL-2.0+
Sergey Kubushync74b2102007-08-10 20:26:18 +02005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
Sergey Kubushync74b2102007-08-10 20:26:18 +02009
10/*
11 * Define this to make U-Boot skip low level initialization when loaded
12 * by initial bootloader. Not required by NAND U-Boot version but IS
13 * required for a NOR version used to burn the real NOR U-Boot into
14 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
15 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
16 * NOR U-Boot is loaded directly from Flash so it must perform all the
17 * low level initialization itself. NAND version is loaded by an initial
18 * bootloader (UBL in TI-ese) that performs such an initialization so it's
19 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
20 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
21 * performing low level init prior to loading. All that means we can NOT use
22 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
23 * we can NOT use NOR version because it performs low level initialization
24 * effectively destroying itself in DDR memory. That's why a separate NOR
25 * version with this define is needed. It is loaded via UART, then one uses
26 * it to somehow download a proper NOR version built WITHOUT this define to
27 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
28 * NOR support into the initial bootloader so it won't be needed but DaVinci
29 * static RAM might be too small for this (I have something like 2Kbytes left
30 * as of now, without NOR support) so this might've not happened...
31 *
32#define CONFIG_NOR_UART_BOOT
33 */
34
35/*=======*/
36/* Board */
37/*=======*/
38#define SONATA_BOARD
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_NAND_SMALLPAGE
40#define CONFIG_SYS_USE_NOR
Christian Riescheccb2132011-11-19 00:45:43 +000041#define MACH_TYPE_SONATA 1254
42#define CONFIG_MACH_TYPE MACH_TYPE_SONATA
Sergey Kubushync74b2102007-08-10 20:26:18 +020043/*===================*/
44/* SoC Configuration */
45/*===================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
47#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
David Brownellf7904362009-05-15 23:44:08 +020048#define CONFIG_SOC_DM644X
Sergey Kubushync74b2102007-08-10 20:26:18 +020049/*====================================================*/
50/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
51/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
52/*====================================================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
54#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
55#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
56#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
Sergey Kubushync74b2102007-08-10 20:26:18 +020057/*=============*/
58/* Memory Info */
59/*=============*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
62#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
Sergey Kubushync74b2102007-08-10 20:26:18 +020063#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
Sergey Kubushync74b2102007-08-10 20:26:18 +020064#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
65#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
66#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
67/*====================*/
68/* Serial Driver info */
69/*====================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define CONFIG_SYS_NS16550
71#define CONFIG_SYS_NS16550_SERIAL
David Brownell7ee38c02009-04-12 15:38:06 -070072#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
David Brownell7239c5da2009-04-12 15:40:16 -070074#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
Sergey Kubushync74b2102007-08-10 20:26:18 +020075#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
76#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Sergey Kubushync74b2102007-08-10 20:26:18 +020077/*===================*/
78/* I2C Configuration */
79/*===================*/
Vitaly Andrianove8459dc2014-04-04 13:16:52 -040080#define CONFIG_SYS_I2C
81#define CONFIG_SYS_I2C_DAVINCI
82#define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
83#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
Sergey Kubushync74b2102007-08-10 20:26:18 +020084/*==================================*/
85/* Network & Ethernet Configuration */
86/*==================================*/
87#define CONFIG_DRIVER_TI_EMAC
88#define CONFIG_MII
Sergey Kubushync74b2102007-08-10 20:26:18 +020089#define CONFIG_BOOTP_DNS
90#define CONFIG_BOOTP_DNS2
91#define CONFIG_BOOTP_SEND_HOSTNAME
92#define CONFIG_NET_RETRY_COUNT 10
93/*=====================*/
94/* Flash & Environment */
95/*=====================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096#ifdef CONFIG_SYS_USE_NAND
Jean-Christophe PLAGNIOL-VILLARDee4f3e22009-03-30 18:58:39 +020097#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050098#define CONFIG_SYS_NAND_CS 2
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020099#undef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100#define CONFIG_SYS_NO_FLASH
Wolfgang Denkb6e7bd92010-10-05 21:17:28 +0200101#define CONFIG_ENV_OVERWRITE /* instead if obsoleted forceenv() */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200102#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200103#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
Sandeep Paulraja16df2c2009-09-08 17:09:52 -0400104#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200105#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_NAND_BASE 0x02000000
107#define CONFIG_SYS_NAND_HW_ECC
108#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200109#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushync74b2102007-08-10 20:26:18 +0200111#ifdef CONFIG_NOR_UART_BOOT
112#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200113#else
114#undef CONFIG_SKIP_LOWLEVEL_INIT
Sergey Kubushync74b2102007-08-10 20:26:18 +0200115#endif
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200116#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#undef CONFIG_SYS_NO_FLASH
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200118#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_FLASH_CFI
120#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
121#define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */
122#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*2)
Sandeep Paulrajf3d5d312010-12-29 14:42:56 -0500123#define CONFIG_ENV_SIZE CONFIG_SYS_FLASH_SECT_SZ
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200124#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200126#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
128#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200129#endif
130/*==============================*/
131/* U-Boot general configuration */
132/*==============================*/
Sergey Kubushync74b2102007-08-10 20:26:18 +0200133#define CONFIG_MISC_INIT_R
134#undef CONFIG_BOOTDELAY
135#define CONFIG_BOOTFILE "uImage" /* Boot file name */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
137#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
138#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
139#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
140#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
141#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200142#define CONFIG_VERSION_VARIABLE
143#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_HUSH_PARSER
Sergey Kubushync74b2102007-08-10 20:26:18 +0200145#define CONFIG_CMDLINE_EDITING
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_LONGHELP
Sergey Kubushync74b2102007-08-10 20:26:18 +0200147#define CONFIG_CRC32_VERIFY
148#define CONFIG_MX_CYCLIC
149/*===================*/
150/* Linux Information */
151/*===================*/
152#define LINUX_BOOT_PARAM_ADDR 0x80000100
153#define CONFIG_CMDLINE_TAG
154#define CONFIG_SETUP_MEMORY_TAGS
155#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
156#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000"
157/*=================*/
158/* U-Boot commands */
159/*=================*/
160#include <config_cmd_default.h>
161#define CONFIG_CMD_ASKENV
162#define CONFIG_CMD_DHCP
163#define CONFIG_CMD_DIAG
164#define CONFIG_CMD_I2C
165#define CONFIG_CMD_MII
166#define CONFIG_CMD_PING
167#define CONFIG_CMD_SAVES
168#define CONFIG_CMD_EEPROM
169#undef CONFIG_CMD_BDI
170#undef CONFIG_CMD_FPGA
171#undef CONFIG_CMD_SETGETDCR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#ifdef CONFIG_SYS_USE_NAND
Sergey Kubushync74b2102007-08-10 20:26:18 +0200173#undef CONFIG_CMD_FLASH
174#undef CONFIG_CMD_IMLS
175#define CONFIG_CMD_NAND
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushync74b2102007-08-10 20:26:18 +0200177#define CONFIG_CMD_JFFS2
178#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
Sergey Kubushync74b2102007-08-10 20:26:18 +0200180#endif
Sandeep Paulrajf74e1422010-12-11 20:37:54 -0500181
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +0000182#ifdef CONFIG_CMD_BDI
183#define CONFIG_CLOCKS
184#endif
185
Sandeep Paulrajf74e1422010-12-11 20:37:54 -0500186#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
187
188#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
189#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
190#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
191 CONFIG_SYS_INIT_RAM_SIZE - \
192 GENERATED_GBL_DATA_SIZE)
193
Sergey Kubushync74b2102007-08-10 20:26:18 +0200194#endif /* __CONFIG_H */