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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7 / . / drivers / serial / lpc32xx_hsuart.c
blob: 7d31c6d4a145b4f3fa104fed3a1d408155e641cb [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]2/*
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]3 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]4 */
5
6#include <common.h>
Simon Glassd96c2602019-12-28 10:44:58 -0700[diff] [blame]7#include <clock_legacy.h>
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]8#include <dm.h>
Marek Vasute503f902012-09-13 16:51:02 +0200[diff] [blame]9#include <serial.h>
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]10#include <dm/platform_data/lpc32xx_hsuart.h>
11
12#include <asm/arch/uart.h>
Marek Vasute503f902012-09-13 16:51:02 +0200[diff] [blame]13#include <linux/compiler.h>
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]14
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]15struct lpc32xx_hsuart_priv {
16 struct hsuart_regs *hsuart;
17};
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]18
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]19static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]20{
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]21 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
22 struct hsuart_regs *hsuart = priv->hsuart;
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]23 u32 div;
24
25 /* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]26 div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]27 if (div > 255)
28 div = 255;
29
30 writel(div, &hsuart->rate);
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]31
32 return 0;
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]33}
34
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]35static int lpc32xx_serial_getc(struct udevice *dev)
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]36{
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]37 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
38 struct hsuart_regs *hsuart = priv->hsuart;
39
40 if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
41 return -EAGAIN;
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]42
43 return readl(&hsuart->rx) & HSUART_RX_DATA;
44}
45
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]46static int lpc32xx_serial_putc(struct udevice *dev, const char c)
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]47{
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]48 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
49 struct hsuart_regs *hsuart = priv->hsuart;
50
51 /* Wait for empty FIFO */
52 if (readl(&hsuart->level) & HSUART_LEVEL_TX)
53 return -EAGAIN;
Vladimir Zapolskiy5deccaf2013-11-30 16:47:01 +0200[diff] [blame]54
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]55 writel(c, &hsuart->tx);
56
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]57 return 0;
58}
59
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]60static int lpc32xx_serial_pending(struct udevice *dev, bool input)
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]61{
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]62 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
63 struct hsuart_regs *hsuart = priv->hsuart;
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]64
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]65 if (input) {
66 if (readl(&hsuart->level) & HSUART_LEVEL_RX)
67 return 1;
68 } else {
69 if (readl(&hsuart->level) & HSUART_LEVEL_TX)
70 return 1;
71 }
72
73 return 0;
74}
75
76static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
77{
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]78 /* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
79 writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
80 HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
81 &hsuart->ctrl);
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]82
Marek Vasute503f902012-09-13 16:51:02 +0200[diff] [blame]83 return 0;
Vladimir Zapolskiycc35fdb2012-04-19 04:33:09 +0000[diff] [blame]84}
85
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]86static int lpc32xx_hsuart_probe(struct udevice *dev)
87{
88 struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev);
89 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
90
91 priv->hsuart = (struct hsuart_regs *)platdata->base;
92
93 lpc32xx_serial_init(priv->hsuart);
94
95 return 0;
96}
97
98static const struct dm_serial_ops lpc32xx_hsuart_ops = {
Marek Vasute503f902012-09-13 16:51:02 +0200[diff] [blame]99 .setbrg = lpc32xx_serial_setbrg,
Marek Vasute503f902012-09-13 16:51:02 +0200[diff] [blame]100 .getc = lpc32xx_serial_getc,
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]101 .putc = lpc32xx_serial_putc,
102 .pending = lpc32xx_serial_pending,
Marek Vasute503f902012-09-13 16:51:02 +0200[diff] [blame]103};
104
Vladimir Zapolskiyf21069e2015-12-19 23:29:24 +0200[diff] [blame]105U_BOOT_DRIVER(lpc32xx_hsuart) = {
106 .name = "lpc32xx_hsuart",
107 .id = UCLASS_SERIAL,
108 .probe = lpc32xx_hsuart_probe,
109 .ops = &lpc32xx_hsuart_ops,
110 .priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv),
111 .flags = DM_FLAG_PRE_RELOC,
112};