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Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +09001/*
2 * Configuation settings for the Renesas Solutions ECOVEC board
3 *
4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +09009 */
10
11#ifndef __ECOVEC_H
12#define __ECOVEC_H
13
14/*
15 * Address Interface BusWidth
16 *-----------------------------------------
17 * 0x0000_0000 U-Boot 16bit
18 * 0x0004_0000 Linux romImage 16bit
19 * 0x0014_0000 MTD for Linux 16bit
20 * 0x0400_0000 Internal I/O 16/32bit
21 * 0x0800_0000 DRAM 32bit
22 * 0x1800_0000 MFI 16bit
23 */
24
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090025#define CONFIG_CPU_SH7724 1
Nobuhiro Iwamatsu77fe6e72012-04-18 11:05:20 +090026#define CONFIG_BOARD_LATE_INIT 1
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090027#define CONFIG_ECOVEC 1
28
29#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
30#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
31
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090032#define CONFIG_CMD_SDRAM
33#define CONFIG_CMD_ENV
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090034
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090035#define CONFIG_DOS_PARTITION
36
37#define CONFIG_BAUDRATE 115200
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090038#define CONFIG_BOOTARGS "console=ttySC0,115200"
39
Vladimir Zapolskiy18a40e82016-11-28 00:15:30 +020040#define CONFIG_DISPLAY_BOARDINFO
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090041#undef CONFIG_SHOW_BOOT_PROGRESS
42
43/* I2C */
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +090044#define CONFIG_SYS_I2C
45#define CONFIG_SYS_I2C_SH
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090046#define CONFIG_SYS_I2C_SLAVE 0x7F
Nobuhiro Iwamatsu2035d772013-10-29 13:33:51 +090047#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
48#define CONFIG_SYS_I2C_SH_BASE0 0xA4470000
49#define CONFIG_SYS_I2C_SH_SPEED0 100000
50#define CONFIG_SYS_I2C_SH_BASE1 0xA4750000
51#define CONFIG_SYS_I2C_SH_SPEED1 100000
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090052#define CONFIG_SH_I2C_DATA_HIGH 4
53#define CONFIG_SH_I2C_DATA_LOW 5
54#define CONFIG_SH_I2C_CLOCK 41666666
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090055
56/* Ether */
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090057#define CONFIG_SH_ETHER 1
58#define CONFIG_SH_ETHER_USE_PORT (0)
59#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
Nobuhiro Iwamatsue50edf92011-12-01 18:48:38 +000060#define CONFIG_PHY_SMSC 1
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090061#define CONFIG_PHYLIB
62#define CONFIG_BITBANGMII
63#define CONFIG_BITBANGMII_MULTI
Nobuhiro Iwamatsua80a6612012-05-16 10:23:21 +090064#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090065
66/* USB / R8A66597 */
67#define CONFIG_USB_R8A66597_HCD
68#define CONFIG_R8A66597_BASE_ADDR 0xA4D80000
69#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */
70#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */
71#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */
72#define CONFIG_SUPERH_ON_CHIP_R8A66597
73
74/* undef to save memory */
75#define CONFIG_SYS_LONGHELP
76/* Monitor Command Prompt */
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090077/* Buffer size for input from the Console */
78#define CONFIG_SYS_CBSIZE 256
79/* Buffer size for Console output */
80#define CONFIG_SYS_PBSIZE 256
81/* max args accepted for monitor commands */
82#define CONFIG_SYS_MAXARGS 16
83/* Buffer size for Boot Arguments passed to kernel */
84#define CONFIG_SYS_BARGSIZE 512
85/* List of legal baudrate settings for this board */
86#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
87
88/* SCIF */
89#define CONFIG_SCIF_CONSOLE 1
90#define CONFIG_SCIF 1
91#define CONFIG_CONS_SCIF0 1
92
93/* Suppress display of console information at boot */
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090094
95/* SDRAM */
96#define CONFIG_SYS_SDRAM_BASE (0x88000000)
97#define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024)
98#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
99
100#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
101#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
102/* Enable alternate, more extensive, memory test */
103#undef CONFIG_SYS_ALT_MEMTEST
104/* Scratch address used by the alternate memory test */
105#undef CONFIG_SYS_MEMTEST_SCRATCH
106
107/* Enable temporary baudrate change while serial download */
108#undef CONFIG_SYS_LOADS_BAUD_CHANGE
109
110/* FLASH */
111#define CONFIG_FLASH_CFI_DRIVER 1
112#define CONFIG_SYS_FLASH_CFI
113#undef CONFIG_SYS_FLASH_QUIET_TEST
114#define CONFIG_SYS_FLASH_EMPTY_INFO
115#define CONFIG_SYS_FLASH_BASE (0xA0000000)
116#define CONFIG_SYS_MAX_FLASH_SECT 512
117
118/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
119#define CONFIG_SYS_MAX_FLASH_BANKS 1
120#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
121
122/* Timeout for Flash erase operations (in ms) */
123#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
124/* Timeout for Flash write operations (in ms) */
125#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
126/* Timeout for Flash set sector lock bit operations (in ms) */
127#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
128/* Timeout for Flash clear lock bit operations (in ms) */
129#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
130
131/*
132 * Use hardware flash sectors protection instead
133 * of U-Boot software protection
134 */
135#undef CONFIG_SYS_FLASH_PROTECTION
136#undef CONFIG_SYS_DIRECT_FLASH_TFTP
137
138/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
139#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
140/* Monitor size */
141#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
142/* Size of DRAM reserved for malloc() use */
143#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +0900144#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
145
146/* ENV setting */
147#define CONFIG_ENV_IS_IN_FLASH
148#define CONFIG_ENV_OVERWRITE 1
149#define CONFIG_ENV_SECT_SIZE (128 * 1024)
150#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
151#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
152/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
153#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
154#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
155
156/* Board Clock */
157#define CONFIG_SYS_CLK_FREQ 41666666
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +0900158#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
159#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +0900160#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +0900161
162#endif /* __ECOVEC_H */