Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 1 | /* |
Bin Meng | a187559 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 2 | * U-Boot - Configuration file for TCM-BF537 board |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #ifndef __CONFIG_TCM_BF537_H__ |
| 6 | #define __CONFIG_TCM_BF537_H__ |
| 7 | |
Mike Frysinger | f348ab8 | 2009-04-24 17:22:40 -0400 | [diff] [blame] | 8 | #include <asm/config-pre.h> |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 9 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 10 | /* |
| 11 | * Processor Settings |
| 12 | */ |
Mike Frysinger | fbcf8e8 | 2010-12-23 14:58:37 -0500 | [diff] [blame] | 13 | #define CONFIG_BFIN_CPU bf537-0.2 |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 14 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS |
| 15 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 16 | /* |
| 17 | * Clock Settings |
| 18 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
| 19 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
| 20 | */ |
| 21 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
| 22 | #define CONFIG_CLKIN_HZ 25000000 |
| 23 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
| 24 | /* 1 = CLKIN / 2 */ |
| 25 | #define CONFIG_CLKIN_HALF 0 |
| 26 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
| 27 | /* 1 = bypass PLL */ |
| 28 | #define CONFIG_PLL_BYPASS 0 |
| 29 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
| 30 | /* Values can range from 0-63 (where 0 means 64) */ |
| 31 | #define CONFIG_VCO_MULT 21 |
| 32 | /* CCLK_DIV controls the core clock divider */ |
| 33 | /* Values can be 1, 2, 4, or 8 ONLY */ |
| 34 | #define CONFIG_CCLK_DIV 1 |
| 35 | /* SCLK_DIV controls the system clock divider */ |
| 36 | /* Values can range from 1-15 */ |
| 37 | #define CONFIG_SCLK_DIV 4 |
| 38 | |
Harald Krapfenbauer | fd04a05 | 2009-10-14 08:37:32 -0400 | [diff] [blame] | 39 | /* Decrease core voltage */ |
| 40 | #define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000) |
| 41 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 42 | /* |
| 43 | * Memory Settings |
| 44 | */ |
| 45 | #define CONFIG_MEM_ADD_WDTH 9 |
| 46 | #define CONFIG_MEM_SIZE 32 |
| 47 | |
| 48 | #define CONFIG_EBIU_SDRRC_VAL 0x3f8 |
| 49 | #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd |
| 50 | |
| 51 | #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) |
| 52 | #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) |
| 53 | #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) |
| 54 | |
Sonic Zhang | 6e6b221 | 2013-12-09 12:45:29 +0800 | [diff] [blame] | 55 | #define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 56 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
| 57 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 58 | /* |
| 59 | * Network Settings |
| 60 | */ |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 61 | #ifndef __ADSPBF534__ |
| 62 | #define ADI_CMDS_NETWORK 1 |
| 63 | #define CONFIG_BFIN_MAC |
Harald Krapfenbauer | fff18be | 2011-05-17 15:25:54 -0400 | [diff] [blame] | 64 | #define CONFIG_SMC911X 1 |
| 65 | #define CONFIG_SMC911X_BASE 0x20308000 |
| 66 | #define CONFIG_SMC911X_16_BIT |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 67 | #define CONFIG_NETCONSOLE 1 |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 68 | #endif |
| 69 | #define CONFIG_HOSTNAME tcm-bf537 |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 70 | |
| 71 | /* |
| 72 | * Flash Settings |
| 73 | */ |
| 74 | #define CONFIG_FLASH_CFI_DRIVER |
| 75 | #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS |
| 76 | #define CONFIG_SYS_FLASH_BASE 0x20000000 |
| 77 | #define CONFIG_SYS_FLASH_CFI |
| 78 | #define CONFIG_SYS_FLASH_PROTECTION |
| 79 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 80 | #define CONFIG_SYS_MAX_FLASH_SECT 67 |
| 81 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 82 | /* |
Harald Krapfenbauer | c94101a | 2011-05-17 15:39:54 -0400 | [diff] [blame] | 83 | * SPI Settings |
| 84 | */ |
| 85 | #define CONFIG_BFIN_SPI |
| 86 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 |
| 87 | |
Harald Krapfenbauer | c94101a | 2011-05-17 15:39:54 -0400 | [diff] [blame] | 88 | /* |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 89 | * Env Storage Settings |
| 90 | */ |
| 91 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Harald Krapfenbauer | ba5c122 | 2011-05-17 15:45:36 -0400 | [diff] [blame] | 92 | #define CONFIG_ENV_OFFSET 0x8000 |
| 93 | #define CONFIG_ENV_SIZE 0x8000 |
| 94 | #define CONFIG_ENV_SECT_SIZE 0x8000 |
| 95 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 96 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) |
| 97 | #define ENV_IS_EMBEDDED |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 98 | #endif |
Mike Frysinger | 9ff67e5 | 2009-06-14 06:29:07 -0400 | [diff] [blame] | 99 | #ifdef ENV_IS_EMBEDDED |
| 100 | /* WARNING - the following is hand-optimized to fit within |
| 101 | * the sector before the environment sector. If it throws |
| 102 | * an error during compilation remove an object here to get |
| 103 | * it linked after the configuration sector. |
| 104 | */ |
| 105 | # define LDS_BOARD_TEXT \ |
Masahiro Yamada | e2906a5 | 2013-11-11 14:36:00 +0900 | [diff] [blame] | 106 | arch/blackfin/lib/built-in.o (.text*); \ |
| 107 | arch/blackfin/cpu/built-in.o (.text*); \ |
Mike Frysinger | 9ff67e5 | 2009-06-14 06:29:07 -0400 | [diff] [blame] | 108 | . = DEFINED(env_offset) ? env_offset : .; \ |
Mike Frysinger | c70e7dd | 2010-11-19 19:28:56 -0500 | [diff] [blame] | 109 | common/env_embedded.o (.text*); |
Mike Frysinger | 9ff67e5 | 2009-06-14 06:29:07 -0400 | [diff] [blame] | 110 | #endif |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 111 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 112 | /* |
| 113 | * I2C Settings |
| 114 | */ |
Scott Jiang | c469703 | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 115 | #define CONFIG_SYS_I2C |
Scott Jiang | fea9b69 | 2014-11-13 15:30:53 +0800 | [diff] [blame] | 116 | #define CONFIG_SYS_I2C_ADI |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 117 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 118 | /* |
Harald Krapfenbauer | c94101a | 2011-05-17 15:39:54 -0400 | [diff] [blame] | 119 | * SPI_MMC Settings |
| 120 | */ |
Harald Krapfenbauer | c94101a | 2011-05-17 15:39:54 -0400 | [diff] [blame] | 121 | #define CONFIG_GENERIC_MMC |
| 122 | #define CONFIG_MMC_SPI |
| 123 | |
| 124 | /* |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 125 | * Misc Settings |
| 126 | */ |
| 127 | #define CONFIG_BAUDRATE 115200 |
| 128 | #define CONFIG_MISC_INIT_R |
| 129 | #define CONFIG_RTC_BFIN |
| 130 | #define CONFIG_UART_CONSOLE 0 |
Harald Krapfenbauer | fd04a05 | 2009-10-14 08:37:32 -0400 | [diff] [blame] | 131 | #define CONFIG_BOOTCOMMAND "run flashboot" |
| 132 | #define FLASHBOOT_ENV_SETTINGS \ |
Harald Krapfenbauer | ba5c122 | 2011-05-17 15:45:36 -0400 | [diff] [blame] | 133 | "flashboot=flread 20040000 1000000 300000;" \ |
Harald Krapfenbauer | fd04a05 | 2009-10-14 08:37:32 -0400 | [diff] [blame] | 134 | "bootm 0x1000000\0" |
Sonic Zhang | 6e6b221 | 2013-12-09 12:45:29 +0800 | [diff] [blame] | 135 | #define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 136 | |
| 137 | /* |
| 138 | * Pull in common ADI header for remaining command/environment setup |
| 139 | */ |
| 140 | #include <configs/bfin_adi_common.h> |
| 141 | |
Mike Frysinger | 9417d9a | 2008-10-12 21:49:28 -0400 | [diff] [blame] | 142 | #endif |