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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 5d44207d1740af4639f6a5638dd08bb27652b047 / . / configs / chromebook_jerry_defconfig
blob: bd24077d14a8b55b3ad6f62207fcfe52395e5706 [file] [log] [blame]
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]1CONFIG_ARM=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]2# CONFIG_SPL_USE_ARCH_MEMCPY is not set
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]3CONFIG_ARCH_ROCKCHIP=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00100000
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]5CONFIG_ROCKCHIP_RK3288=y
Tom Rini8728c972017-03-13 13:48:42 -0400[diff] [blame]6# CONFIG_SPL_MMC_SUPPORT is not set
Tom Rinid168bcb2019-04-29 15:54:04 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
8CONFIG_SPL_STACK_R_ADDR=0x80000
Tom Rini358b6a22018-06-04 11:57:37 -0400[diff] [blame]9CONFIG_DEBUG_UART_BASE=0xff690000
10CONFIG_DEBUG_UART_CLOCK=24000000
Simon Glasse404ade2016-09-12 23:18:57 -0600[diff] [blame]11CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassf35ed9e2016-09-12 23:18:58 -0600[diff] [blame]12CONFIG_SPL_SPI_SUPPORT=y
Tom Rinifb82fe32017-06-19 09:47:40 -0400[diff] [blame]13CONFIG_DEBUG_UART=y
Tom Rini665c35a2019-09-23 11:47:37 -0400[diff] [blame]14CONFIG_SPL_TEXT_BASE=0xff704000
Simon Glass37304aa2019-07-20 20:51:14 -0600[diff] [blame]15CONFIG_USE_PREBOOT=y
Simon Glass98af8792016-10-17 20:12:35 -0600[diff] [blame]16CONFIG_SILENT_CONSOLE=y
Simon Glass2d0c01b2018-12-27 20:15:23 -0700[diff] [blame]17CONFIG_LOG=y
Klaus Gogera2a50532018-05-25 23:45:05 +0200[diff] [blame]18CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
Simon Glassef26d602016-10-17 20:12:37 -0600[diff] [blame]19# CONFIG_DISPLAY_CPUINFO is not set
Mario Six78eba692018-03-28 14:38:17 +0200[diff] [blame]20CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glassfe974712017-05-31 17:57:33 -0600[diff] [blame]21CONFIG_BOARD_EARLY_INIT_F=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]22# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]23CONFIG_SPL_STACK_R=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]24CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]25# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
26# CONFIG_SPL_CRC32_SUPPORT is not set
27CONFIG_SPL_PAYLOAD="u-boot.img"
Marek Vasut55500432018-04-07 16:05:27 +0200[diff] [blame]28CONFIG_SPL_SPI_LOAD=y
Hannes Schmelzer1ee774d2019-08-22 15:41:46 +0200[diff] [blame]29CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]30CONFIG_CMD_GPIO=y
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]31CONFIG_CMD_GPT=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]32CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]33CONFIG_CMD_MMC=y
Simon Glass719d36e2017-08-04 16:34:46 -0600[diff] [blame]34CONFIG_CMD_SF_TEST=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]35CONFIG_CMD_SPI=y
Eddie Caic3d098e2017-12-15 08:17:13 +0800[diff] [blame]36CONFIG_CMD_USB=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]37# CONFIG_CMD_SETEXPR is not set
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]38CONFIG_CMD_CACHE=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_TIME=y
Simon Glass2d0c01b2018-12-27 20:15:23 -0700[diff] [blame]40CONFIG_CMD_SOUND=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]41CONFIG_CMD_PMIC=y
42CONFIG_CMD_REGULATOR=y
Patrick Delaunayb0cf7332017-01-27 11:00:37 +0100[diff] [blame]43# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunaybd42a942017-01-27 11:00:41 +0100[diff] [blame]44# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunayb331cd62017-01-27 11:00:42 +0100[diff] [blame]45CONFIG_SPL_PARTITION_UUIDS=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]46CONFIG_SPL_OF_CONTROL=y
Tom Rini8c5cad02018-09-03 15:26:12 -0400[diff] [blame]47CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
Simon Glass57db8c62016-11-13 14:22:09 -0700[diff] [blame]48CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]49CONFIG_SPL_OF_PLATDATA=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]50CONFIG_REGMAP=y
huang lin41c7f662015-11-17 14:20:13 +0800[diff] [blame]51CONFIG_SPL_REGMAP=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]52CONFIG_SYSCON=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]53CONFIG_SPL_SYSCON=y
Simon Glass79918092016-01-21 19:43:49 -0700[diff] [blame]54# CONFIG_SPL_SIMPLE_BUS is not set
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]55# CONFIG_SPL_BLK is not set
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]56CONFIG_CLK=y
57CONFIG_SPL_CLK=y
58CONFIG_ROCKCHIP_GPIO=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]59CONFIG_I2C_CROS_EC_TUNNEL=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]60CONFIG_SYS_I2C_ROCKCHIP=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]61CONFIG_I2C_MUX=y
Simon Glassef26d602016-10-17 20:12:37 -0600[diff] [blame]62CONFIG_DM_KEYBOARD=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]63CONFIG_CROS_EC_KEYB=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]64CONFIG_CROS_EC=y
65CONFIG_CROS_EC_SPI=y
Simon Glass79d020e2016-01-21 19:43:36 -0700[diff] [blame]66CONFIG_PWRSEQ=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]67# CONFIG_SPL_DM_MMC is not set
Masahiro Yamada55ed3b42017-01-10 13:32:04 +0900[diff] [blame]68CONFIG_MMC_DW=y
Masahiro Yamadafed44082017-01-10 13:32:03 +0900[diff] [blame]69CONFIG_MMC_DW_ROCKCHIP=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]70CONFIG_SF_DEFAULT_BUS=2
Patrick Delaunay14453fb2019-02-27 15:20:36 +0100[diff] [blame]71CONFIG_SF_DEFAULT_SPEED=20000000
Urja Rannikko64df5122019-05-13 13:51:03 +0000[diff] [blame]72CONFIG_SPI_FLASH_GIGADEVICE=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]73CONFIG_PINCTRL=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]74CONFIG_PINCONF=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]75CONFIG_SPL_PINCTRL=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]76# CONFIG_SPL_PINMUX is not set
77CONFIG_SPL_PINCONF=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]78CONFIG_DM_PMIC=y
Simon Glass27a19612016-01-21 19:44:13 -0700[diff] [blame]79# CONFIG_SPL_PMIC_CHILDREN is not set
Jacob Chen453c5a92017-05-02 14:54:52 +0800[diff] [blame]80CONFIG_PMIC_RK8XX=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]81CONFIG_DM_REGULATOR_FIXED=y
Jacob Chen453c5a92017-05-02 14:54:52 +0800[diff] [blame]82CONFIG_REGULATOR_RK8XX=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]83CONFIG_PWM_ROCKCHIP=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]84CONFIG_RAM=y
85CONFIG_SPL_RAM=y
Bin Meng80df6912015-09-28 05:14:15 -0700[diff] [blame]86CONFIG_DEBUG_UART_SHIFT=2
Simon Glass2d0c01b2018-12-27 20:15:23 -0700[diff] [blame]87CONFIG_SOUND=y
88CONFIG_I2S=y
89CONFIG_I2S_ROCKCHIP=y
Simon Glassec4ac4e2016-01-21 19:43:35 -0700[diff] [blame]90CONFIG_ROCKCHIP_SPI=y
Tom Riniaca5cd22016-09-08 16:11:59 -0400[diff] [blame]91CONFIG_SYSRESET=y
Tom Riniecad7052017-08-25 17:50:26 -0400[diff] [blame]92CONFIG_USB=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]93# CONFIG_SPL_DM_USB is not set
94CONFIG_USB_DWC2=y
Adam Ford65748642018-01-02 10:39:52 -0600[diff] [blame]95CONFIG_ROCKCHIP_USB2_PHY=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]96CONFIG_DM_VIDEO=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]97# CONFIG_VIDEO_BPP8 is not set
Simon Glass815ed792018-12-27 15:25:19 -0700[diff] [blame]98CONFIG_CONSOLE_TRUETYPE=y
Anatolij Gustschin7588c312016-01-25 17:17:22 +0100[diff] [blame]99CONFIG_DISPLAY=y
Simon Glass74336f72016-01-21 19:45:19 -0700[diff] [blame]100CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.comb98f0a32017-04-17 22:24:23 +0800[diff] [blame]101CONFIG_DISPLAY_ROCKCHIP_EDP=y
102CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Simon Glass815ed792018-12-27 15:25:19 -0700[diff] [blame]103# CONFIG_USE_PRIVATE_LIBGCC is not set
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000[diff] [blame]104CONFIG_SPL_TINY_MEMSET=y
Simon Glasse2e947f2015-08-30 16:55:42 -0600[diff] [blame]105CONFIG_CMD_DHRYSTONE=y
106CONFIG_ERRNO_STR=y