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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andreas Färber37a0c602017-05-15 17:51:18 +08002/*
3 * Copyright (c) 2016 Andreas Färber
Andreas Färber37a0c602017-05-15 17:51:18 +08004 */
5
6#ifndef __CONFIG_RK3368_COMMON_H
7#define __CONFIG_RK3368_COMMON_H
8
Klaus Gogere3e842f2017-10-06 19:24:09 +02009#include "rockchip-common.h"
10
Andreas Färber37a0c602017-05-15 17:51:18 +080011#define CONFIG_SYS_CACHELINE_SIZE 64
12
Kever Yang15f09a12019-03-28 11:01:23 +080013#include <asm/arch-rockchip/hardware.h>
Andreas Färber37a0c602017-05-15 17:51:18 +080014#include <linux/sizes.h>
15
Kever Yang6d1970f2017-06-23 16:11:05 +080016#define CONFIG_SYS_SDRAM_BASE 0
17#define SDRAM_MAX_SIZE 0xff000000
Andreas Färber37a0c602017-05-15 17:51:18 +080018#define CONFIG_SYS_CBSIZE 1024
19#define CONFIG_SKIP_LOWLEVEL_INIT
20
Kever Yang192445b2019-07-09 22:00:31 +080021#define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020
22#define COUNTER_FREQUENCY 24000000
Philipp Tomsiche78b04f2017-06-22 23:31:55 +020023
Kever Yang5f246802019-07-22 19:59:09 +080024#define CONFIG_IRAM_BASE 0xff8c0000
25
Andreas Färber37a0c602017-05-15 17:51:18 +080026#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
27#define CONFIG_SYS_LOAD_ADDR 0x00280000
28
Kever Yang60244672019-10-18 15:54:16 +080029#define CONFIG_SPL_MAX_SIZE 0x40000
Philipp Tomsichc61177a2017-07-14 17:52:09 +020030#define CONFIG_SPL_BSS_START_ADDR 0x400000
31#define CONFIG_SPL_BSS_MAX_SIZE 0x20000
Kever Yangcd193462019-03-29 22:48:26 +080032#define CONFIG_SPL_STACK 0x00188000
Philipp Tomsichc61177a2017-07-14 17:52:09 +020033
Andreas Färber37a0c602017-05-15 17:51:18 +080034#ifndef CONFIG_SPL_BUILD
35#define ENV_MEM_LAYOUT_SETTINGS \
36 "scriptaddr=0x00500000\0" \
37 "pxefile_addr_r=0x00600000\0" \
38 "fdt_addr_r=0x5600000\0" \
39 "kernel_addr_r=0x280000\0" \
40 "ramdisk_addr_r=0x5bf0000\0"
41
Andreas Färber37a0c602017-05-15 17:51:18 +080042#include <config_distro_bootcmd.h>
43
44#define CONFIG_EXTRA_ENV_SETTINGS \
Klaus Gogera2a50532018-05-25 23:45:05 +020045 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
Andy Yanffaefb82017-09-04 20:32:23 +080046 ENV_MEM_LAYOUT_SETTINGS \
Andreas Färber37a0c602017-05-15 17:51:18 +080047 BOOTENV
48
49#endif
50
51#endif