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Sergei Poselenovfd51b0e2008-06-06 15:42:44 +02001/*
2 * (C) Copyright 2008
3 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +02006 */
7
8#include <common.h>
9
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020010#if defined(CONFIG_SYS_NAND_BASE)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020011#include <nand.h>
12#include <asm/errno.h>
13#include <asm/io.h>
14
15static int state;
Marek Vasut169de902011-10-04 00:56:09 +020016static void sc_nand_write_byte(struct mtd_info *mtd, u_char byte);
17static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
18static u_char sc_nand_read_byte(struct mtd_info *mtd);
19static u16 sc_nand_read_word(struct mtd_info *mtd);
20static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
Marek Vasut169de902011-10-04 00:56:09 +020021static int sc_nand_device_ready(struct mtd_info *mtdinfo);
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020022
23#define FPGA_NAND_CMD_MASK (0x7 << 28)
Scott Wood68cf19a2008-08-13 18:24:05 -050024#define FPGA_NAND_CMD_COMMAND (0x0 << 28)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020025#define FPGA_NAND_CMD_ADDR (0x1 << 28)
26#define FPGA_NAND_CMD_READ (0x2 << 28)
27#define FPGA_NAND_CMD_WRITE (0x3 << 28)
28#define FPGA_NAND_BUSY (0x1 << 15)
29#define FPGA_NAND_ENABLE (0x1 << 31)
Scott Wood68cf19a2008-08-13 18:24:05 -050030#define FPGA_NAND_DATA_SHIFT 16
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020031
32/**
Marek Vasut169de902011-10-04 00:56:09 +020033 * sc_nand_write_byte - write one byte to the chip
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020034 * @mtd: MTD device structure
35 * @byte: pointer to data byte to write
36 */
Marek Vasut169de902011-10-04 00:56:09 +020037static void sc_nand_write_byte(struct mtd_info *mtd, u_char byte)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020038{
Marek Vasut169de902011-10-04 00:56:09 +020039 sc_nand_write_buf(mtd, (const uchar *)&byte, sizeof(byte));
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020040}
41
42/**
Marek Vasut169de902011-10-04 00:56:09 +020043 * sc_nand_write_buf - write buffer to chip
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020044 * @mtd: MTD device structure
45 * @buf: data buffer
46 * @len: number of bytes to write
47 */
Marek Vasut169de902011-10-04 00:56:09 +020048static void sc_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020049{
50 int i;
51 struct nand_chip *this = mtd->priv;
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020052
53 for (i = 0; i < len; i++) {
Scott Wood68cf19a2008-08-13 18:24:05 -050054 out_be32(this->IO_ADDR_W,
55 state | (buf[i] << FPGA_NAND_DATA_SHIFT));
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020056 }
57}
58
59
60/**
Marek Vasut169de902011-10-04 00:56:09 +020061 * sc_nand_read_byte - read one byte from the chip
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020062 * @mtd: MTD device structure
63 */
Marek Vasut169de902011-10-04 00:56:09 +020064static u_char sc_nand_read_byte(struct mtd_info *mtd)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020065{
66 u8 byte;
Marek Vasut169de902011-10-04 00:56:09 +020067 sc_nand_read_buf(mtd, (uchar *)&byte, sizeof(byte));
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020068 return byte;
69}
70
71/**
Marek Vasut169de902011-10-04 00:56:09 +020072 * sc_nand_read_word - read one word from the chip
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020073 * @mtd: MTD device structure
74 */
Marek Vasut169de902011-10-04 00:56:09 +020075static u16 sc_nand_read_word(struct mtd_info *mtd)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020076{
77 u16 word;
Marek Vasut169de902011-10-04 00:56:09 +020078 sc_nand_read_buf(mtd, (uchar *)&word, sizeof(word));
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020079 return word;
80}
81
82/**
Marek Vasut169de902011-10-04 00:56:09 +020083 * sc_nand_read_buf - read chip data into buffer
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020084 * @mtd: MTD device structure
85 * @buf: buffer to store date
86 * @len: number of bytes to read
87 */
Marek Vasut169de902011-10-04 00:56:09 +020088static void sc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +020089{
90 int i;
91 struct nand_chip *this = mtd->priv;
92 int val;
93
94 val = (state & FPGA_NAND_ENABLE) | FPGA_NAND_CMD_READ;
95
96 out_be32(this->IO_ADDR_W, val);
97 for (i = 0; i < len; i++) {
98 buf[i] = (in_be32(this->IO_ADDR_R) >> FPGA_NAND_DATA_SHIFT) & 0xff;
99 }
100}
101
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200102/**
Marek Vasut169de902011-10-04 00:56:09 +0200103 * sc_nand_device_ready - Check the NAND device is ready for next command.
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200104 * @mtd: MTD device structure
105 */
Marek Vasut169de902011-10-04 00:56:09 +0200106static int sc_nand_device_ready(struct mtd_info *mtdinfo)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200107{
108 struct nand_chip *this = mtdinfo->priv;
109
110 if (in_be32(this->IO_ADDR_W) & FPGA_NAND_BUSY)
111 return 0; /* busy */
112 return 1;
113}
114
115/**
Marek Vasut169de902011-10-04 00:56:09 +0200116 * sc_nand_hwcontrol - NAND control functions wrapper.
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200117 * @mtd: MTD device structure
118 * @cmd: Command
119 */
Marek Vasut169de902011-10-04 00:56:09 +0200120static void sc_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200121{
Scott Wood68cf19a2008-08-13 18:24:05 -0500122 if (ctrl & NAND_CTRL_CHANGE) {
123 state &= ~(FPGA_NAND_CMD_MASK | FPGA_NAND_ENABLE);
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200124
Scott Wood68cf19a2008-08-13 18:24:05 -0500125 switch (ctrl & (NAND_ALE | NAND_CLE)) {
126 case 0:
127 state |= FPGA_NAND_CMD_WRITE;
128 break;
129
130 case NAND_ALE:
131 state |= FPGA_NAND_CMD_ADDR;
132 break;
133
134 case NAND_CLE:
135 state |= FPGA_NAND_CMD_COMMAND;
136 break;
137
138 default:
139 printf("%s: unknown ctrl %#x\n", __FUNCTION__, ctrl);
140 }
141
142 if (ctrl & NAND_NCE)
143 state |= FPGA_NAND_ENABLE;
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200144 }
Scott Wood68cf19a2008-08-13 18:24:05 -0500145
146 if (cmd != NAND_CMD_NONE)
Marek Vasut169de902011-10-04 00:56:09 +0200147 sc_nand_write_byte(mtdinfo, cmd);
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200148}
149
150int board_nand_init(struct nand_chip *nand)
151{
Marek Vasut169de902011-10-04 00:56:09 +0200152 nand->cmd_ctrl = sc_nand_hwcontrol;
Scott Wood68cf19a2008-08-13 18:24:05 -0500153 nand->ecc.mode = NAND_ECC_SOFT;
Marek Vasut169de902011-10-04 00:56:09 +0200154 nand->dev_ready = sc_nand_device_ready;
155 nand->read_byte = sc_nand_read_byte;
156 nand->read_word = sc_nand_read_word;
157 nand->write_buf = sc_nand_write_buf;
158 nand->read_buf = sc_nand_read_buf;
Sergei Poselenovfd51b0e2008-06-06 15:42:44 +0200159
160 return 0;
161}
162
163#endif