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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +02002/*
3 * Copyright (C) 2013 Samsung Electronics
4 * Sanghee Kim <sh0130.kim@samsung.com>
5 * Piotr Wilczek <p.wilczek@samsung.com>
6 *
7 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
Piotr Wilczek4d6c9672013-09-20 15:01:27 +02008 */
9
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010010#ifndef __CONFIG_TRATS2_H
11#define __CONFIG_TRATS2_H
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020012
Simon Glass4c7bb1d2014-10-07 22:01:44 -060013#include <configs/exynos4-common.h>
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020014
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010015#define CONFIG_TIZEN /* TIZEN lib */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020016
Łukasz Majewskic4e96db2014-01-14 08:02:26 +010017#define CONFIG_SYS_L2CACHE_OFF
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020018#ifndef CONFIG_SYS_L2CACHE_OFF
19#define CONFIG_SYS_L2_PL310
20#define CONFIG_SYS_PL310_BASE 0x10502000
21#endif
22
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010023/* TRATS2 has 4 banks of DRAM */
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010024#define CONFIG_SYS_SDRAM_BASE 0x40000000
25#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
26#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
27/* memtest works on */
28#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
29#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
30#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020031
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020032/* select serial console configuration */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020033
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010034/* Console configuration */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020035
Łukasz Majewski1018b0a2015-04-01 12:34:30 +020036#define CONFIG_BOOTCOMMAND "run autoboot"
Dongjin Kim232ed3c2017-10-28 00:22:27 -040037#define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8"
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010038
39#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
40 - GENERATED_GBL_DATA_SIZE)
41
42#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
43
44#define CONFIG_SYS_MONITOR_BASE 0x00000000
45
Piotr Wilczek1ecab0f2014-03-07 14:59:49 +010046#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
47#define CONFIG_ENV_SIZE 4096
48#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
49
50#define CONFIG_ENV_OVERWRITE
51
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020052/* Tizen - partitions definitions */
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010053#define PARTS_CSA "csa-mmc"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020054#define PARTS_BOOT "boot"
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010055#define PARTS_QBOOT "qboot"
Piotr Wilczekdca36682013-11-27 11:11:02 +010056#define PARTS_CSC "csc"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020057#define PARTS_ROOT "platform"
58#define PARTS_DATA "data"
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020059#define PARTS_UMS "ums"
60
61#define PARTS_DEFAULT \
Piotr Wilczeka5e15bb2013-12-30 09:40:40 +010062 "uuid_disk=${uuid_gpt_disk};" \
Piotr Wilczekdca36682013-11-27 11:11:02 +010063 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010064 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
65 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020066 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Piotr Wilczekdca36682013-11-27 11:11:02 +010067 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010068 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020069 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
70
Piotr Wilczek09f98012013-11-12 15:22:46 +010071#define CONFIG_DFU_ALT \
Mateusz Zalegab7d42592014-04-28 21:13:25 +020072 "u-boot raw 0x80 0x800;" \
Łukasz Majewskidcb7eb62014-07-22 10:17:06 +020073 "/uImage ext4 0 2;" \
74 "/modem.bin ext4 0 2;" \
75 "/exynos4412-trats2.dtb ext4 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010076 ""PARTS_CSA" part 0 1;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010077 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010078 ""PARTS_QBOOT" part 0 3;" \
79 ""PARTS_CSC" part 0 4;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010080 ""PARTS_ROOT" part 0 5;" \
81 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczaka0afc6f2014-01-22 12:02:47 +010082 ""PARTS_UMS" part 0 7;" \
Łukasz Majewski1018b0a2015-04-01 12:34:30 +020083 "params.bin raw 0x38 0x8;" \
84 "/Image.itb ext4 0 2\0"
Piotr Wilczek09f98012013-11-12 15:22:46 +010085
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020086#define CONFIG_EXTRA_ENV_SETTINGS \
87 "bootk=" \
Piotr Wilczek425e26d2014-01-22 15:54:37 +010088 "run loaduimage;" \
89 "if run loaddtb; then " \
90 "bootm 0x40007FC0 - ${fdtaddr};" \
91 "fi;" \
92 "bootm 0x40007FC0;\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020093 "updatebackup=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +090094 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
95 " mmc dev 0 0\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020096 "updatebootb=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +090097 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +020098 "mmcboot=" \
99 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
100 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100101 "run bootk\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200102 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
103 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
104 "verify=n\0" \
105 "rootfstype=ext4\0" \
Dongjin Kim232ed3c2017-10-28 00:22:27 -0400106 "console=" CONFIG_DEFAULT_CONSOLE "\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200107 "kernelname=uImage\0" \
Piotr Wilczek2c8043c2013-11-27 11:11:00 +0100108 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
109 "${kernelname}\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200110 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
111 "${fdtfile}\0" \
Piotr Wilczeka5e15bb2013-12-30 09:40:40 +0100112 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200113 "mmcbootpart=2\0" \
114 "mmcrootpart=5\0" \
115 "opts=always_resume=1\0" \
116 "partitions=" PARTS_DEFAULT \
Piotr Wilczek09f98012013-11-12 15:22:46 +0100117 "dfu_alt_info=" CONFIG_DFU_ALT \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200118 "uartpath=ap\0" \
119 "usbpath=ap\0" \
120 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
121 "consoleoff=set console console=ram; save; reset\0" \
122 "spladdr=0x40000100\0" \
123 "splsize=0x200\0" \
124 "splfile=falcon.bin\0" \
125 "spl_export=" \
126 "setexpr spl_imgsize ${splsize} + 8 ;" \
127 "setenv spl_imgsize 0x${spl_imgsize};" \
128 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
129 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
130 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
131 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
132 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
133 "spl export atags 0x40007FC0;" \
134 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
135 "mw.l ${spl_addr_tmp} ${splsize};" \
136 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
137 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
138 "setenv spl_imgsize;" \
139 "setenv spl_imgaddr;" \
140 "setenv spl_addr_tmp;\0" \
Łukasz Majewski1018b0a2015-04-01 12:34:30 +0200141 CONFIG_EXTRA_ENV_ITB \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200142 "fdtaddr=40800000\0" \
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200143
Albert ARIBAUD519fdde2014-04-08 09:25:08 +0200144/* GPT */
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200145
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100146/* Security subsystem - enable hw_rand() */
147#define CONFIG_EXYNOS_ACE_SHA
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100148
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100149/* Common misc for Samsung */
150#define CONFIG_MISC_COMMON
151
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100152/* Download menu - Samsung common */
153#define CONFIG_LCD_MENU
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100154
155/* Download menu - definitions for check keys */
156#ifndef __ASSEMBLY__
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100157
158#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
159#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
160#define KEY_PWR_STATUS_MASK (1 << 0)
161#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
162#define KEY_PWR_INTERRUPT_MASK (1 << 1)
163
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530164#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
165#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100166#endif /* __ASSEMBLY__ */
167
168/* LCD console */
169#define LCD_BPP LCD_COLOR16
Przemyslaw Marczakf64236a2014-01-22 11:24:19 +0100170
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200171/* LCD */
Przemyslaw Marczak2df21cb2014-01-22 11:24:16 +0100172#define CONFIG_BMP_16BPP
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200173#define CONFIG_FB_ADDR 0x52504000
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200174#define CONFIG_EXYNOS_MIPI_DSIM
175#define CONFIG_VIDEO_BMP_GZIP
Przemyslaw Marczak903afe12013-11-29 18:30:43 +0100176#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200177
Piotr Wilczek4d6c9672013-09-20 15:01:27 +0200178#endif /* __CONFIG_H */