| Jagan Teki | ac97a9e | 2020-05-26 11:33:44 +0800 | [diff] [blame] | 1 | # |
| 2 | # Phy drivers for Rockchip platforms |
| 3 | # |
| 4 | |
| 5 | menu "Rockchip PHY driver" |
| 6 | |
| 7 | config PHY_ROCKCHIP_INNO_USB2 |
| 8 | bool "Rockchip INNO USB2PHY Driver" |
| 9 | depends on ARCH_ROCKCHIP |
| 10 | select PHY |
| 11 | help |
| 12 | Support for Rockchip USB2.0 PHY with Innosilicon IP block. |
| 13 | |
| Jagan Teki | 7bdeb4e | 2020-07-09 23:41:01 +0530 | [diff] [blame] | 14 | config PHY_ROCKCHIP_PCIE |
| 15 | bool "Rockchip PCIe PHY Driver" |
| 16 | depends on ARCH_ROCKCHIP |
| 17 | select PHY |
| 18 | help |
| 19 | Enable this to support the Rockchip PCIe PHY. |
| 20 | |
| Shawn Lin | 6ec62b6 | 2021-01-15 18:01:21 +0800 | [diff] [blame] | 21 | config PHY_ROCKCHIP_SNPS_PCIE3 |
| 22 | bool "Rockchip Snps PCIe3 PHY Driver" |
| 23 | depends on PHY && ARCH_ROCKCHIP |
| 24 | help |
| 25 | Support for Rockchip PCIe3 PHY with Synopsys IP block. |
| Shawn Lin | 9ddc078 | 2021-01-15 18:01:22 +0800 | [diff] [blame] | 26 | It could support PCIe Gen3 single root complex, and could |
| 27 | also be able splited into multiple combinations of lanes. |
| 28 | |
| Shawn Lin | 6ec62b6 | 2021-01-15 18:01:21 +0800 | [diff] [blame] | 29 | |
| Jagan Teki | 214de08 | 2020-05-26 11:33:45 +0800 | [diff] [blame] | 30 | config PHY_ROCKCHIP_TYPEC |
| 31 | bool "Rockchip TYPEC PHY Driver" |
| 32 | depends on ARCH_ROCKCHIP |
| 33 | select PHY |
| 34 | help |
| 35 | Enable this to support the Rockchip USB TYPEC PHY. |
| 36 | |
| Jagan Teki | ac97a9e | 2020-05-26 11:33:44 +0800 | [diff] [blame] | 37 | endmenu |