blob: 06131edb9fe58cbfb8f7177ed627f8cc5c4601b8 [file] [log] [blame]
Patrick Delaunay22929e12018-10-26 09:02:52 +02001# SPDX-License-Identifier: GPL-2.0+
Simon Glassf26c8a82015-06-23 15:39:15 -06002#
3# Copyright (c) 2015 Google, Inc
4# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5#
Simon Glassf26c8a82015-06-23 15:39:15 -06006
Anup Patelb630d572019-02-25 08:14:55 +00007obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o
8obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o
9obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o
Peng Fan1c643302019-07-31 07:01:34 +000010obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk.o clk-divider.o clk-mux.o clk-gate.o
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020011obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o
Peng Fan00097632019-07-31 07:01:54 +000012obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o
Stephen Warrend9fd7002016-08-08 11:28:24 -060013
Anup Pateld04c79d2019-06-25 06:31:02 +000014obj-y += analogbits/
Peng Fanf77d4412018-10-18 14:28:30 +020015obj-y += imx/
Stephen Warrend9fd7002016-08-08 11:28:24 -060016obj-y += tegra/
Mario Sixfcca9db2018-01-15 11:06:54 +010017obj-$(CONFIG_ARCH_ASPEED) += aspeed/
Ryder Lee0bd7dc72018-11-15 10:07:54 +080018obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
Weijie Gao77ed3c42019-09-25 17:45:21 +080019obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
Jerome Brunetf5abfed2019-02-10 14:54:30 +010020obj-$(CONFIG_ARCH_MESON) += meson/
Mario Sixfcca9db2018-01-15 11:06:54 +010021obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
Marek Vasutf9f016a2018-07-31 17:58:07 +020022obj-$(CONFIG_ARCH_SOCFPGA) += altera/
Wenyou Yang9e5935c2016-07-20 17:55:12 +080023obj-$(CONFIG_CLK_AT91) += at91/
Marek Behún82a248d2018-04-24 17:21:25 +020024obj-$(CONFIG_CLK_MVEBU) += mvebu/
Álvaro Fernández Rojas5357eb92017-05-07 20:13:01 +020025obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
Paul Burtondd7c7492016-09-08 07:47:38 +010026obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
Mario Sixfcca9db2018-01-15 11:06:54 +010027obj-$(CONFIG_CLK_EXYNOS) += exynos/
Eugeniy Paltseve80dac02017-12-10 21:20:08 +030028obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
Mario Six07d538d2018-08-06 10:23:36 +020029obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
Manivannan Sadhasivamae485b52018-06-14 23:38:35 +053030obj-$(CONFIG_CLK_OWL) += owl/
Mario Sixfcca9db2018-01-15 11:06:54 +010031obj-$(CONFIG_CLK_RENESAS) += renesas/
Anup Patelc40b6df2019-02-25 08:14:49 +000032obj-$(CONFIG_CLK_SIFIVE) += sifive/
Jagan Teki0d47bc72018-12-22 21:32:49 +053033obj-$(CONFIG_ARCH_SUNXI) += sunxi/
Patrice Chotardf264e232017-11-15 13:14:48 +010034obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o
Patrick Delaunaya6151912018-03-12 10:46:15 +010035obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o
Mario Sixfcca9db2018-01-15 11:06:54 +010036obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
Liviu Dudaua71e9072018-09-17 17:50:00 +010037obj-$(CONFIG_CLK_VEXPRESS_OSC) += clk_vexpress_osc.o
Mario Sixfcca9db2018-01-15 11:06:54 +010038obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
39obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
Mario Sixf0bcbe62018-04-27 14:53:15 +020040obj-$(CONFIG_ICS8N3QV01) += ics8n3qv01.o
Mario Sixfcca9db2018-01-15 11:06:54 +010041obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
42obj-$(CONFIG_SANDBOX) += clk_sandbox.o
43obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
Lukasz Majewski87e460c2019-06-24 15:50:50 +020044obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
Patrice Chotard4c3aebd2017-09-13 18:00:06 +020045obj-$(CONFIG_STM32H7) += clk_stm32h7.o
Andreas Dannenberge585bef2018-08-27 15:57:43 +053046obj-$(CONFIG_CLK_TI_SCI) += clk-ti-sci.o
Siva Durga Prasad Paladugu95105082019-06-23 12:24:57 +053047obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
Tero Kristo260777f2019-09-27 19:14:26 +030048obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o