blob: 5598bca21c5e64298cf5b6e5a74d989fc62e6624 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Mugunthan V Na0594ce2016-02-15 15:31:37 +05302/*
3 * Direct Memory Access U-Class driver
4 *
Álvaro Fernández Rojas27ab27f2018-11-28 19:17:50 +01005 * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
6 * Copyright (C) 2015 - 2018 Texas Instruments Incorporated <www.ti.com>
7 * Written by Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V Na0594ce2016-02-15 15:31:37 +05308 *
9 * Author: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V Na0594ce2016-02-15 15:31:37 +053010 */
11
12#include <common.h>
Simon Glass1eb69ae2019-11-14 12:57:39 -070013#include <cpu_func.h>
Mugunthan V Na0594ce2016-02-15 15:31:37 +053014#include <dm.h>
Álvaro Fernández Rojas27ab27f2018-11-28 19:17:50 +010015#include <dm/read.h>
Álvaro Fernández Rojas10b4dc52018-11-28 19:17:49 +010016#include <dma-uclass.h>
Álvaro Fernández Rojas27ab27f2018-11-28 19:17:50 +010017#include <dt-structs.h>
Mugunthan V Na0594ce2016-02-15 15:31:37 +053018#include <errno.h>
19
Álvaro Fernández Rojas27ab27f2018-11-28 19:17:50 +010020#ifdef CONFIG_DMA_CHANNELS
21static inline struct dma_ops *dma_dev_ops(struct udevice *dev)
22{
23 return (struct dma_ops *)dev->driver->ops;
24}
25
26# if CONFIG_IS_ENABLED(OF_CONTROL)
27static int dma_of_xlate_default(struct dma *dma,
28 struct ofnode_phandle_args *args)
29{
30 debug("%s(dma=%p)\n", __func__, dma);
31
32 if (args->args_count > 1) {
33 pr_err("Invaild args_count: %d\n", args->args_count);
34 return -EINVAL;
35 }
36
37 if (args->args_count)
38 dma->id = args->args[0];
39 else
40 dma->id = 0;
41
42 return 0;
43}
44
45int dma_get_by_index(struct udevice *dev, int index, struct dma *dma)
46{
47 int ret;
48 struct ofnode_phandle_args args;
49 struct udevice *dev_dma;
50 const struct dma_ops *ops;
51
52 debug("%s(dev=%p, index=%d, dma=%p)\n", __func__, dev, index, dma);
53
54 assert(dma);
55 dma->dev = NULL;
56
57 ret = dev_read_phandle_with_args(dev, "dmas", "#dma-cells", 0, index,
58 &args);
59 if (ret) {
60 pr_err("%s: dev_read_phandle_with_args failed: err=%d\n",
61 __func__, ret);
62 return ret;
63 }
64
65 ret = uclass_get_device_by_ofnode(UCLASS_DMA, args.node, &dev_dma);
66 if (ret) {
67 pr_err("%s: uclass_get_device_by_ofnode failed: err=%d\n",
68 __func__, ret);
69 return ret;
70 }
71
72 dma->dev = dev_dma;
73
74 ops = dma_dev_ops(dev_dma);
75
76 if (ops->of_xlate)
77 ret = ops->of_xlate(dma, &args);
78 else
79 ret = dma_of_xlate_default(dma, &args);
80 if (ret) {
81 pr_err("of_xlate() failed: %d\n", ret);
82 return ret;
83 }
84
85 return dma_request(dev_dma, dma);
86}
87
88int dma_get_by_name(struct udevice *dev, const char *name, struct dma *dma)
89{
90 int index;
91
92 debug("%s(dev=%p, name=%s, dma=%p)\n", __func__, dev, name, dma);
93 dma->dev = NULL;
94
95 index = dev_read_stringlist_search(dev, "dma-names", name);
96 if (index < 0) {
97 pr_err("dev_read_stringlist_search() failed: %d\n", index);
98 return index;
99 }
100
101 return dma_get_by_index(dev, index, dma);
102}
103# endif /* OF_CONTROL */
104
105int dma_request(struct udevice *dev, struct dma *dma)
106{
107 struct dma_ops *ops = dma_dev_ops(dev);
108
109 debug("%s(dev=%p, dma=%p)\n", __func__, dev, dma);
110
111 dma->dev = dev;
112
113 if (!ops->request)
114 return 0;
115
116 return ops->request(dma);
117}
118
119int dma_free(struct dma *dma)
120{
121 struct dma_ops *ops = dma_dev_ops(dma->dev);
122
123 debug("%s(dma=%p)\n", __func__, dma);
124
125 if (!ops->free)
126 return 0;
127
128 return ops->free(dma);
129}
130
131int dma_enable(struct dma *dma)
132{
133 struct dma_ops *ops = dma_dev_ops(dma->dev);
134
135 debug("%s(dma=%p)\n", __func__, dma);
136
137 if (!ops->enable)
138 return -ENOSYS;
139
140 return ops->enable(dma);
141}
142
143int dma_disable(struct dma *dma)
144{
145 struct dma_ops *ops = dma_dev_ops(dma->dev);
146
147 debug("%s(dma=%p)\n", __func__, dma);
148
149 if (!ops->disable)
150 return -ENOSYS;
151
152 return ops->disable(dma);
153}
154
155int dma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
156{
157 struct dma_ops *ops = dma_dev_ops(dma->dev);
158
159 debug("%s(dma=%p)\n", __func__, dma);
160
161 if (!ops->prepare_rcv_buf)
162 return -1;
163
164 return ops->prepare_rcv_buf(dma, dst, size);
165}
166
167int dma_receive(struct dma *dma, void **dst, void *metadata)
168{
169 struct dma_ops *ops = dma_dev_ops(dma->dev);
170
171 debug("%s(dma=%p)\n", __func__, dma);
172
173 if (!ops->receive)
174 return -ENOSYS;
175
176 return ops->receive(dma, dst, metadata);
177}
178
179int dma_send(struct dma *dma, void *src, size_t len, void *metadata)
180{
181 struct dma_ops *ops = dma_dev_ops(dma->dev);
182
183 debug("%s(dma=%p)\n", __func__, dma);
184
185 if (!ops->send)
186 return -ENOSYS;
187
188 return ops->send(dma, src, len, metadata);
189}
Vignesh Raghavendrab8a4dd22019-12-04 22:17:20 +0530190
191int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data)
192{
193 struct dma_ops *ops = dma_dev_ops(dma->dev);
194
195 debug("%s(dma=%p)\n", __func__, dma);
196
197 if (!ops->get_cfg)
198 return -ENOSYS;
199
200 return ops->get_cfg(dma, cfg_id, cfg_data);
201}
Álvaro Fernández Rojas27ab27f2018-11-28 19:17:50 +0100202#endif /* CONFIG_DMA_CHANNELS */
203
Mugunthan V Na0594ce2016-02-15 15:31:37 +0530204int dma_get_device(u32 transfer_type, struct udevice **devp)
205{
206 struct udevice *dev;
207 int ret;
208
209 for (ret = uclass_first_device(UCLASS_DMA, &dev); dev && !ret;
210 ret = uclass_next_device(&dev)) {
211 struct dma_dev_priv *uc_priv;
212
213 uc_priv = dev_get_uclass_priv(dev);
214 if (uc_priv->supported & transfer_type)
215 break;
216 }
217
218 if (!dev) {
Masahiro Yamada9b643e32017-09-16 14:10:41 +0900219 pr_err("No DMA device found that supports %x type\n",
Mugunthan V Na0594ce2016-02-15 15:31:37 +0530220 transfer_type);
221 return -EPROTONOSUPPORT;
222 }
223
224 *devp = dev;
225
226 return ret;
227}
228
229int dma_memcpy(void *dst, void *src, size_t len)
230{
231 struct udevice *dev;
232 const struct dma_ops *ops;
233 int ret;
234
235 ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev);
236 if (ret < 0)
237 return ret;
238
239 ops = device_get_ops(dev);
240 if (!ops->transfer)
241 return -ENOSYS;
242
243 /* Invalidate the area, so no writeback into the RAM races with DMA */
244 invalidate_dcache_range((unsigned long)dst, (unsigned long)dst +
245 roundup(len, ARCH_DMA_MINALIGN));
246
247 return ops->transfer(dev, DMA_MEM_TO_MEM, dst, src, len);
248}
249
250UCLASS_DRIVER(dma) = {
251 .id = UCLASS_DMA,
252 .name = "dma",
253 .flags = DM_UC_FLAG_SEQ_ALIAS,
254 .per_device_auto_alloc_size = sizeof(struct dma_dev_priv),
255};