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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Holger Brunck0f2b7212012-03-21 13:42:46 +01002/*
3 * (C) Copyright 2012
4 * Holger Brunck, Keymile GmbH Hannover, <holger.brunck@keymile.com>
5 * Christian Herzig, Keymile AG Switzerland, <christian.herzig@keymile.com>
Holger Brunck0f2b7212012-03-21 13:42:46 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Mario Six5bc05432018-03-28 14:38:20 +020011#define CONFIG_HOSTNAME "kmcoge5ne"
Holger Brunck0f2b7212012-03-21 13:42:46 +010012#define CONFIG_KM_BOARD_NAME "kmcoge5ne"
13#define CONFIG_KM_DEF_NETDEV "netdev=eth1\0"
Holger Brunckbe7576f2013-01-21 03:55:23 +000014#define CONFIG_NAND_ECC_BCH
Holger Brunck0f2b7212012-03-21 13:42:46 +010015#define CONFIG_NAND_KMETER1
16#define CONFIG_SYS_MAX_NAND_DEVICE 1
17#define NAND_MAX_CHIPS 1
18#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */
19
20#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0"
21#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1"
Holger Brunck0f2b7212012-03-21 13:42:46 +010022
Mario Sixfb1b0992019-01-21 09:17:34 +010023/* include common defines/options for all Keymile boards */
24#include "km/keymile-common.h"
25#include "km/km-powerpc.h"
Mario Sixaed7d0e2019-01-21 09:18:23 +010026#include "km/km-mpc83xx.h"
27#include "km/km-mpc8360.h"
Mario Sixfb1b0992019-01-21 09:17:34 +010028
29/*
30 * System Clock Setup
31 */
32#define CONFIG_83XX_CLKIN 66000000
33#define CONFIG_SYS_CLK_FREQ 66000000
34#define CONFIG_83XX_PCICLK 66000000
35
Holger Brunck0f2b7212012-03-21 13:42:46 +010036/**
37 * KMCOGE5NE has 512 MB RAM
38 */
39#define CONFIG_SYS_DDR_CS0_CONFIG (\
40 CSCONFIG_EN | \
41 CSCONFIG_AP | \
Valentin Longchamp22554ba2015-11-17 10:53:33 +010042 CSCONFIG_ODT_WR_ONLY_CURRENT | \
Holger Brunck0f2b7212012-03-21 13:42:46 +010043 CSCONFIG_BANK_BIT_3 | \
44 CSCONFIG_ROW_BIT_13 | \
45 CSCONFIG_COL_BIT_10)
Holger Brunck0f2b7212012-03-21 13:42:46 +010046
Holger Brunck0f2b7212012-03-21 13:42:46 +010047/*
48 * BFTIC3 on the local bus CS4
49 */
50#define CONFIG_SYS_BFTIC3_BASE 0xB0000000
51#define CONFIG_SYS_BFTIC3_SIZE 256
52
Thomas Herzmann95209b62012-05-04 10:55:56 +020053/* enable POST tests */
54#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
55#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
56#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END
57#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
58#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
Thomas Herzmann95209b62012-05-04 10:55:56 +020059
Holger Brunck0f2b7212012-03-21 13:42:46 +010060#endif /* CONFIG */