blob: 50eafdf60b66266a310b8c4f727ba0427a6ce8c6 [file] [log] [blame]
Enric Balletbo i Serra5f5c1d12013-04-04 22:27:58 +00001/*
2 * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __CONFIG_IGEP0033_H
15#define __CONFIG_IGEP0033_H
16
17#define CONFIG_AM33XX
18
19#include <asm/arch/omap.h>
20
21/* Mach type */
22#define MACH_TYPE_IGEP0033 4521 /* Until the next sync */
23#define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
24
25/* Clock defines */
26#define V_OSCK 24000000 /* Clock output from T2 */
27#define V_SCLK (V_OSCK)
28
29/* DMA defines */
30#define CONFIG_DMA_COHERENT
31#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
32
33#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
34#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
35#define CONFIG_SYS_LONGHELP /* undef to save memory */
36#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
37#define CONFIG_SYS_PROMPT "U-Boot# "
38#define CONFIG_SYS_NO_FLASH
39
40/* Display cpuinfo */
41#define CONFIG_DISPLAY_CPUINFO
42
43/* Commands to include */
44#include <config_cmd_default.h>
45
46#define CONFIG_CMD_ASKENV
47#define CONFIG_CMD_BOOTZ
48#define CONFIG_CMD_DHCP
49#define CONFIG_CMD_ECHO
50#define CONFIG_CMD_EXT4
51#define CONFIG_CMD_FAT
52#define CONFIG_CMD_FS_GENERIC
53#define CONFIG_CMD_MMC
54#define CONFIG_CMD_MTDPARTS
55#define CONFIG_CMD_NAND
56#define CONFIG_CMD_NET
57#define CONFIG_CMD_PING
58#define CONFIG_CMD_UBI
59#define CONFIG_CMD_UBIFS
60
61/*
62 * Because the issues explained in doc/README.memory-test, the "mtest command
63 * is considered deprecated. It should not be enabled in most normal ports of
64 * U-Boot.
65 */
66#undef CONFIG_CMD_MEMTEST
67
68#define CONFIG_BOOTDELAY 1 /* negative for no autoboot */
69#define CONFIG_ENV_VARS_UBOOT_CONFIG
70#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
71#define CONFIG_EXTRA_ENV_SETTINGS \
72 "loadaddr=0x80200000\0" \
73 "rdaddr=0x81000000\0" \
74 "bootfile=/boot/uImage\0" \
75 "console=ttyO0,115200n8\0" \
76 "optargs=\0" \
77 "mmcdev=0\0" \
78 "mmcroot=/dev/mmcblk0p2 rw\0" \
79 "mmcrootfstype=ext4 rootwait\0" \
80 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
81 "ramrootfstype=ext2\0" \
82 "mmcargs=setenv bootargs console=${console} " \
83 "${optargs} " \
84 "root=${mmcroot} " \
85 "rootfstype=${mmcrootfstype}\0" \
86 "bootenv=uEnv.txt\0" \
87 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
88 "importbootenv=echo Importing environment from mmc ...; " \
89 "env import -t $loadaddr $filesize\0" \
90 "ramargs=setenv bootargs console=${console} " \
91 "${optargs} " \
92 "root=${ramroot} " \
93 "rootfstype=${ramrootfstype}\0" \
94 "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
95 "loaduimagefat=load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
96 "loaduimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
97 "mmcboot=echo Booting from mmc ...; " \
98 "run mmcargs; " \
99 "bootm ${loadaddr}\0" \
100 "ramboot=echo Booting from ramdisk ...; " \
101 "run ramargs; " \
102 "bootm ${loadaddr}\0" \
103
104#define CONFIG_BOOTCOMMAND \
105 "mmc dev ${mmcdev}; if mmc rescan; then " \
106 "echo SD/MMC found on device ${mmcdev};" \
107 "if run loadbootenv; then " \
108 "echo Loaded environment from ${bootenv};" \
109 "run importbootenv;" \
110 "fi;" \
111 "if test -n $uenvcmd; then " \
112 "echo Running uenvcmd ...;" \
113 "run uenvcmd;" \
114 "fi;" \
115 "if run loaduimage; then " \
116 "run mmcboot;" \
117 "fi;" \
118 "fi;" \
119
120/* Max number of command args */
121#define CONFIG_SYS_MAXARGS 16
122
123/* Console I/O Buffer Size */
124#define CONFIG_SYS_CBSIZE 512
125
126/* Print Buffer Size */
127#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
128 + sizeof(CONFIG_SYS_PROMPT) + 16)
129
130/* Boot Argument Buffer Size */
131#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
132#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
133#define CONFIG_SYS_HZ 1000 /* 1ms clock */
134
135/* Physical Memory Map */
136#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
137#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
138#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
139
140#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
141#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
142 GENERATED_GBL_DATA_SIZE)
143/* Platform/Board specific defs */
144#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
145#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
146#define CONFIG_SYS_HZ 1000
147
148/* NS16550 Configuration */
149#define CONFIG_SYS_NS16550
150#define CONFIG_SYS_NS16550_SERIAL
151#define CONFIG_SYS_NS16550_REG_SIZE (-4)
152#define CONFIG_SYS_NS16550_CLK (48000000)
153#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
154
155#define CONFIG_SERIAL_MULTI
156#define CONFIG_CONS_INDEX 1
157#define CONFIG_BAUDRATE 115200
158
159#define CONFIG_ENV_OVERWRITE 1
160#define CONFIG_SYS_CONSOLE_INFO_QUIET
161
162/* MMC support */
163#define CONFIG_MMC
164#define CONFIG_GENERIC_MMC
165#define CONFIG_OMAP_HSMMC
166#define CONFIG_DOS_PARTITION
167
168/* GPIO support */
169#define CONFIG_OMAP_GPIO
170
171/* Ethernet support */
172#define CONFIG_DRIVER_TI_CPSW
173#define CONFIG_MII
174#define CONFIG_BOOTP_DEFAULT
175#define CONFIG_BOOTP_DNS
176#define CONFIG_BOOTP_DNS2
177#define CONFIG_BOOTP_SEND_HOSTNAME
178#define CONFIG_BOOTP_GATEWAY
179#define CONFIG_BOOTP_SUBNETMASK
180#define CONFIG_NET_RETRY_COUNT 10
181#define CONFIG_NET_MULTI
182#define CONFIG_PHYLIB
183#define CONFIG_PHY_ADDR 0
184#define CONFIG_PHY_SMSC
185
186/* NAND support */
187#define CONFIG_NAND
188#define CONFIG_NAND_OMAP_GPMC
189#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
190#define CONFIG_SYS_NAND_BASE (0x08000000) /* phys address CS0 */
191#define CONFIG_SYS_MAX_NAND_DEVICE 1
192#define CONFIG_SYS_NAND_ONFI_DETECTION 1
193#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
194#define CONFIG_ENV_IS_IN_NAND
195#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
196
197#define CONFIG_MTD_PARTITIONS
198#define CONFIG_MTD_DEVICE
199#define CONFIG_RBTREE
200#define CONFIG_LZO
201
202#define MTDIDS_DEFAULT "nand0=nand"
203#define MTDPARTS_DEFAULT "mtdparts=nand:512k(SPL),"\
204 "1m(U-Boot),128k(U-Boot Env),"\
205 "5m(Kernel),-(File System)"
206
207/* Unsupported features */
208#undef CONFIG_USE_IRQ
209
210/* Defines for SPL */
211#define CONFIG_SPL
212#define CONFIG_SPL_FRAMEWORK
213#define CONFIG_SPL_TEXT_BASE 0x402F0400
214#define CONFIG_SPL_MAX_SIZE (101 * 1024)
215#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
216
217#define CONFIG_SPL_BSS_START_ADDR 0x80000000
218#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
219
220#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
221#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
222#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
223#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
224#define CONFIG_SPL_MMC_SUPPORT
225#define CONFIG_SPL_FAT_SUPPORT
226#define CONFIG_SPL_LIBCOMMON_SUPPORT
227#define CONFIG_SPL_LIBDISK_SUPPORT
228#define CONFIG_SPL_LIBGENERIC_SUPPORT
229#define CONFIG_SPL_SERIAL_SUPPORT
230#define CONFIG_SPL_GPIO_SUPPORT
231#define CONFIG_SPL_YMODEM_SUPPORT
232#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
233
234#define CONFIG_SPL_BOARD_INIT
235#define CONFIG_SPL_NAND_AM33XX_BCH
236#define CONFIG_SPL_NAND_SUPPORT
237#define CONFIG_SPL_NAND_BASE
238#define CONFIG_SPL_NAND_DRIVERS
239#define CONFIG_SPL_NAND_ECC
240#define CONFIG_SYS_NAND_5_ADDR_CYCLE
241#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
242 CONFIG_SYS_NAND_PAGE_SIZE)
243#define CONFIG_SYS_NAND_PAGE_SIZE 2048
244#define CONFIG_SYS_NAND_OOBSIZE 64
245#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
246#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
247#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
248 10, 11, 12, 13, 14, 15, 16, 17, \
249 18, 19, 20, 21, 22, 23, 24, 25, \
250 26, 27, 28, 29, 30, 31, 32, 33, \
251 34, 35, 36, 37, 38, 39, 40, 41, \
252 42, 43, 44, 45, 46, 47, 48, 49, \
253 50, 51, 52, 53, 54, 55, 56, 57, }
254
255#define CONFIG_SYS_NAND_ECCSIZE 512
256#define CONFIG_SYS_NAND_ECCBYTES 14
257
258#define CONFIG_SYS_NAND_ECCSTEPS 4
259#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
260 CONFIG_SYS_NAND_ECCSTEPS)
261
262#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
263
264#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
265
266/*
267 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
268 * 64 bytes before this address should be set aside for u-boot.img's
269 * header. That is 0x800FFFC0--0x80100000 should not be used for any
270 * other needs.
271 */
272#define CONFIG_SYS_TEXT_BASE 0x80800000
273#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
274#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
275
276/*
277 * Since SPL did pll and ddr initialization for us,
278 * we don't need to do it twice.
279 */
280#ifndef CONFIG_SPL_BUILD
281#define CONFIG_SKIP_LOWLEVEL_INIT
282#endif
283
284#endif /* ! __CONFIG_IGEP0033_H */