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Sandeep Paulraj6ab176d2009-10-10 12:00:47 -04001/*
2 * Copyright (C) 2009 Texas Instruments Incorporated
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
22
23/* Spectrum Digital TMS320DM6467 EVM board */
24#define DAVINCI_DM6467EVM
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050025#define CONFIG_SYS_USE_NAND
26#define CONFIG_SYS_NAND_SMALLPAGE
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040027
28#define CONFIG_SKIP_LOWLEVEL_INIT
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040029
30/* SoC Configuration */
31#define CONFIG_ARM926EJS /* arm926ejs CPU */
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050032
33/* Clock rates detection */
34#ifndef __ASSEMBLY__
35extern unsigned int davinci_arm_clk_get(void);
36#endif
37
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050038/* Arm Clock frequency */
39#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
40/* Timer Input clock freq */
41#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040042#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040043#define CONFIG_SYS_HZ 1000
44#define CONFIG_SOC_DM646X
45
46/* EEPROM definitions for EEPROM */
47#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
48#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
49#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
50#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
51
52/* Memory Info */
53#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040054#define CONFIG_SYS_MEMTEST_START 0x80000000
55#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
56#define CONFIG_NR_DRAM_BANKS 1
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040057#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
58#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */
59
60/* Linux interfacing */
61#define CONFIG_CMDLINE_TAG
62#define CONFIG_SETUP_MEMORY_TAGS
63#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */
64#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
Manjunath Hadlib79df8f2011-11-08 08:59:57 -050065#define CONFIG_REVISION_TAG
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040066
67/* Serial Driver info */
68#define CONFIG_SYS_NS16550
69#define CONFIG_SYS_NS16550_SERIAL
70#define CONFIG_SYS_NS16550_REG_SIZE 4
71#define CONFIG_SYS_NS16550_COM1 0x01c20000
72#define CONFIG_SYS_NS16550_CLK 24000000
73#define CONFIG_CONS_INDEX 1
74#define CONFIG_BAUDRATE 115200
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040075
76/* I2C Configuration */
77#define CONFIG_HARD_I2C
78#define CONFIG_DRIVER_DAVINCI_I2C
79#define CONFIG_SYS_I2C_SPEED 80000
80#define CONFIG_SYS_I2C_SLAVE 10
81
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050082/* Network & Ethernet Configuration */
83#define CONFIG_DRIVER_TI_EMAC
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050084#define CONFIG_MII
85#define CONFIG_BOOTP_DEFAULT
86#define CONFIG_BOOTP_DNS
87#define CONFIG_BOOTP_DNS2
88#define CONFIG_BOOTP_SEND_HOSTNAME
89#define CONFIG_NET_RETRY_COUNT 10
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050090#define CONFIG_CMD_NET
91
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040092/* Flash & Environment */
93#define CONFIG_SYS_NO_FLASH
94#ifdef CONFIG_SYS_USE_NAND
95#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050096#define CONFIG_SYS_NAND_CS 2
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040097#undef CONFIG_ENV_IS_IN_FLASH
98#define CONFIG_ENV_IS_IN_NAND
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040099#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
100#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, }
101#define CONFIG_SYS_NAND_HW_ECC
102#define CONFIG_SYS_MAX_NAND_DEVICE 1
103#define CONFIG_ENV_OFFSET 0
104#else
105#define CONFIG_ENV_IS_NOWHERE
106#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */
107#endif
108
109/* U-Boot general configuration */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400110#define CONFIG_BOOTDELAY 3
111#define CONFIG_BOOTFILE "uImage" /* Boot file name */
112#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */
113#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
114#define CONFIG_SYS_PBSIZE \
115 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
116#define CONFIG_SYS_MAXARGS 16
117#define CONFIG_VERSION_VARIABLE
118#define CONFIG_AUTO_COMPLETE
119#define CONFIG_SYS_HUSH_PARSER
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400120#define CONFIG_CMDLINE_EDITING
121#define CONFIG_SYS_LONGHELP
122#define CONFIG_CRC32_VERIFY
123#define CONFIG_MX_CYCLIC
124#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm"
125#define CONFIG_BOOTARGS \
126 "mem=120M console=ttyS0,115200n8 " \
127 "root=/dev/hda1 rw noinitrd ip=dhcp"
128
129/* U-Boot commands */
130#include <config_cmd_default.h>
131#define CONFIG_CMD_ASKENV
132#define CONFIG_CMD_DIAG
133#define CONFIG_CMD_I2C
134#define CONFIG_CMD_MII
135#define CONFIG_CMD_SAVES
136#define CONFIG_CMD_EEPROM
Sandeep Paulrajb157dd52010-12-28 17:38:22 -0500137#define CONFIG_CMD_PING
138#define CONFIG_CMD_DHCP
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400139#undef CONFIG_CMD_BDI
140#undef CONFIG_CMD_FPGA
141#undef CONFIG_CMD_SETGETDCR
142#ifdef CONFIG_SYS_USE_NAND
143#undef CONFIG_CMD_FLASH
144#undef CONFIG_CMD_IMLS
145#define CONFIG_CMD_NAND
146#endif
147
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +0000148#ifdef CONFIG_CMD_BDI
149#define CONFIG_CLOCKS
150#endif
151
Sandeep Paulraj8a16f9c2010-12-11 20:38:57 -0500152#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
153
154#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
155#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
156#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
157 CONFIG_SYS_INIT_RAM_SIZE - \
158 GENERATED_GBL_DATA_SIZE)
159
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400160#endif /* __CONFIG_H */