blob: a78e50e7c602588443180ca59723c927bbfedd5b [file] [log] [blame]
wdenk138ff602004-12-16 15:52:40 +00001/*
2 * (C) Copyright 2004
3 * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#define SDRAM_DDR 1 /* is DDR */
25
wdenk138ff602004-12-16 15:52:40 +000026/* Settings for XLB = 132 MHz */
27#define SDRAM_MODE 0x018D0000
28#define SDRAM_EMODE 0x40090000
Marian Balakowicz5fb6d712007-11-15 13:29:55 +010029#define SDRAM_CONTROL 0x714F0F00
wdenk138ff602004-12-16 15:52:40 +000030#define SDRAM_CONFIG1 0x73722930
31#define SDRAM_CONFIG2 0x47770000
32#define SDRAM_TAPDELAY 0x10000000