blob: fedd14609192130f68447748cbe16c8e535d94b8 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Fleming5f184712011-04-08 02:10:27 -05002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Andy Flemingb21f87a32014-07-25 17:39:08 -05004 * Andy Fleming <afleming@gmail.com>
Andy Fleming5f184712011-04-08 02:10:27 -05005 *
Andy Fleming5f184712011-04-08 02:10:27 -05006 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9#ifndef _PHY_H
10#define _PHY_H
11
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -050012#include <dm.h>
Simon Glassf2176512020-02-03 07:36:17 -070013#include <linux/errno.h>
Andy Fleming5f184712011-04-08 02:10:27 -050014#include <linux/list.h>
15#include <linux/mii.h>
16#include <linux/ethtool.h>
17#include <linux/mdio.h>
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +100018#include <log.h>
Joe Hershbergerf070b1a2018-07-17 15:02:30 -050019#include <phy_interface.h>
Andy Fleming5f184712011-04-08 02:10:27 -050020
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010021#define PHY_FIXED_ID 0xa5a55a5a
Samuel Mendoza-Jonasf641a8a2019-06-18 11:37:17 +100022#define PHY_NCSI_ID 0xbeefcafe
23
Siva Durga Prasad Paladuguf41e5882018-11-27 11:49:11 +053024/*
25 * There is no actual id for this.
26 * This is just a dummy id for gmii2rgmmi converter.
27 */
28#define PHY_GMII2RGMII_ID 0x5a5a5a5a
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010029
Andy Fleming5f184712011-04-08 02:10:27 -050030#define PHY_MAX_ADDR 32
31
Shaohui Xieddcd1f32016-01-28 15:55:46 +080032#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
33
Florian Fainelli4dae6102016-01-13 16:59:33 +030034#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
Andy Fleming5f184712011-04-08 02:10:27 -050035 SUPPORTED_TP | \
36 SUPPORTED_MII)
37
Florian Fainelli4dae6102016-01-13 16:59:33 +030038#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
39 SUPPORTED_10baseT_Full)
40
41#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
42 SUPPORTED_100baseT_Full)
43
44#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
Andy Fleming5f184712011-04-08 02:10:27 -050045 SUPPORTED_1000baseT_Full)
46
Florian Fainelli4dae6102016-01-13 16:59:33 +030047#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
48 PHY_100BT_FEATURES | \
49 PHY_DEFAULT_FEATURES)
50
51#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
52 PHY_1000BT_FEATURES)
53
Andy Fleming5f184712011-04-08 02:10:27 -050054#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
55 SUPPORTED_10000baseT_Full)
56
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020057#ifndef PHY_ANEG_TIMEOUT
Andy Fleming5f184712011-04-08 02:10:27 -050058#define PHY_ANEG_TIMEOUT 4000
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020059#endif
Andy Fleming5f184712011-04-08 02:10:27 -050060
61
Andy Fleming5f184712011-04-08 02:10:27 -050062struct phy_device;
63
64#define MDIO_NAME_LEN 32
65
66struct mii_dev {
67 struct list_head link;
68 char name[MDIO_NAME_LEN];
69 void *priv;
70 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
71 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
72 u16 val);
73 int (*reset)(struct mii_dev *bus);
74 struct phy_device *phymap[PHY_MAX_ADDR];
75 u32 phy_mask;
76};
77
78/* struct phy_driver: a structure which defines PHY behavior
79 *
80 * uid will contain a number which represents the PHY. During
81 * startup, the driver will poll the PHY to find out what its
82 * UID--as defined by registers 2 and 3--is. The 32-bit result
83 * gotten from the PHY will be masked to
84 * discard any bits which may change based on revision numbers
85 * unimportant to functionality
86 *
87 */
88struct phy_driver {
89 char *name;
90 unsigned int uid;
91 unsigned int mask;
92 unsigned int mmds;
93
94 u32 features;
95
96 /* Called to do any driver startup necessities */
97 /* Will be called during phy_connect */
98 int (*probe)(struct phy_device *phydev);
99
100 /* Called to configure the PHY, and modify the controller
101 * based on the results. Should be called after phy_connect */
102 int (*config)(struct phy_device *phydev);
103
104 /* Called when starting up the controller */
105 int (*startup)(struct phy_device *phydev);
106
107 /* Called when bringing down the controller */
108 int (*shutdown)(struct phy_device *phydev);
109
Stefano Babicb71841b2013-09-02 15:42:30 +0200110 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
111 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
112 u16 val);
Carlo Caione4f6746d2019-02-08 17:25:06 +0000113
114 /* Phy specific driver override for reading a MMD register */
115 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
116
117 /* Phy specific driver override for writing a MMD register */
118 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
119 u16 val);
120
Andy Fleming5f184712011-04-08 02:10:27 -0500121 struct list_head list;
Alex Margineand718b692019-11-14 18:28:29 +0200122
123 /* driver private data */
124 ulong data;
Andy Fleming5f184712011-04-08 02:10:27 -0500125};
126
127struct phy_device {
128 /* Information about the PHY type */
129 /* And management functions */
130 struct mii_dev *bus;
131 struct phy_driver *drv;
132 void *priv;
133
Simon Glassc74c8e62015-04-05 16:07:39 -0600134#ifdef CONFIG_DM_ETH
135 struct udevice *dev;
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500136 ofnode node;
Simon Glassc74c8e62015-04-05 16:07:39 -0600137#else
Andy Fleming5f184712011-04-08 02:10:27 -0500138 struct eth_device *dev;
Simon Glassc74c8e62015-04-05 16:07:39 -0600139#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500140
141 /* forced speed & duplex (no autoneg)
142 * partner speed & duplex & pause (autoneg)
143 */
144 int speed;
145 int duplex;
146
147 /* The most recently read link state */
148 int link;
149 int port;
150 phy_interface_t interface;
151
152 u32 advertising;
153 u32 supported;
154 u32 mmds;
155
156 int autoneg;
157 int addr;
158 int pause;
159 int asym_pause;
160 u32 phy_id;
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000161 bool is_c45;
Andy Fleming5f184712011-04-08 02:10:27 -0500162 u32 flags;
163};
164
Shaohui Xief55a7762013-11-14 19:00:31 +0800165struct fixed_link {
166 int phy_id;
167 int duplex;
168 int link_speed;
169 int pause;
170 int asym_pause;
171};
172
Dan Murphy6325c8b2020-05-04 16:14:36 -0500173/**
174 * phy_read - Convenience function for reading a given PHY register
175 * @phydev: the phy_device struct
176 * @devad: The MMD to read from
177 * @regnum: register number to read
178 * @return: value for success or negative errno for failure
179 */
Andy Fleming5f184712011-04-08 02:10:27 -0500180static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
181{
182 struct mii_dev *bus = phydev->bus;
183
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000184 if (!bus || !bus->read) {
185 debug("%s: No bus configured\n", __func__);
186 return -1;
187 }
188
Andy Fleming5f184712011-04-08 02:10:27 -0500189 return bus->read(bus, phydev->addr, devad, regnum);
190}
191
Dan Murphy6325c8b2020-05-04 16:14:36 -0500192/**
193 * phy_write - Convenience function for writing a given PHY register
194 * @phydev: the phy_device struct
195 * @devad: The MMD to read from
196 * @regnum: register number to write
197 * @val: value to write to @regnum
198 * @return: 0 for success or negative errno for failure
199 */
Andy Fleming5f184712011-04-08 02:10:27 -0500200static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
201 u16 val)
202{
203 struct mii_dev *bus = phydev->bus;
204
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000205 if (!bus || !bus->read) {
206 debug("%s: No bus configured\n", __func__);
207 return -1;
208 }
209
Andy Fleming5f184712011-04-08 02:10:27 -0500210 return bus->write(bus, phydev->addr, devad, regnum, val);
211}
212
Dan Murphy6325c8b2020-05-04 16:14:36 -0500213/**
214 * phy_mmd_start_indirect - Convenience function for writing MMD registers
215 * @phydev: the phy_device struct
216 * @devad: The MMD to read from
217 * @regnum: register number to write
218 * @return: None
219 */
Carlo Caione4f6746d2019-02-08 17:25:06 +0000220static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
221 int regnum)
222{
223 /* Write the desired MMD Devad */
224 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
225
226 /* Write the desired MMD register address */
227 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
228
229 /* Select the Function : DATA with no post increment */
230 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
231 (devad | MII_MMD_CTRL_NOINCR));
232}
233
Dan Murphy6325c8b2020-05-04 16:14:36 -0500234/**
235 * phy_read_mmd - Convenience function for reading a register
236 * from an MMD on a given PHY.
237 * @phydev: The phy_device struct
238 * @devad: The MMD to read from
239 * @regnum: The register on the MMD to read
240 * @return: Value for success or negative errno for failure
241 */
Carlo Caione4f6746d2019-02-08 17:25:06 +0000242static inline int phy_read_mmd(struct phy_device *phydev, int devad,
243 int regnum)
244{
245 struct phy_driver *drv = phydev->drv;
246
247 if (regnum > (u16)~0 || devad > 32)
248 return -EINVAL;
249
250 /* driver-specific access */
251 if (drv->read_mmd)
252 return drv->read_mmd(phydev, devad, regnum);
253
254 /* direct C45 / C22 access */
255 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
256 devad == MDIO_DEVAD_NONE || !devad)
257 return phy_read(phydev, devad, regnum);
258
259 /* indirect C22 access */
260 phy_mmd_start_indirect(phydev, devad, regnum);
261
262 /* Read the content of the MMD's selected register */
263 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
264}
265
Dan Murphy6325c8b2020-05-04 16:14:36 -0500266/**
267 * phy_write_mmd - Convenience function for writing a register
268 * on an MMD on a given PHY.
269 * @phydev: The phy_device struct
270 * @devad: The MMD to read from
271 * @regnum: The register on the MMD to read
272 * @val: value to write to @regnum
273 * @return: 0 for success or negative errno for failure
274 */
Carlo Caione4f6746d2019-02-08 17:25:06 +0000275static inline int phy_write_mmd(struct phy_device *phydev, int devad,
276 int regnum, u16 val)
277{
278 struct phy_driver *drv = phydev->drv;
279
280 if (regnum > (u16)~0 || devad > 32)
281 return -EINVAL;
282
283 /* driver-specific access */
284 if (drv->write_mmd)
285 return drv->write_mmd(phydev, devad, regnum, val);
286
287 /* direct C45 / C22 access */
288 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
289 devad == MDIO_DEVAD_NONE || !devad)
290 return phy_write(phydev, devad, regnum, val);
291
292 /* indirect C22 access */
293 phy_mmd_start_indirect(phydev, devad, regnum);
294
295 /* Write the data into MMD's selected register */
296 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
297}
298
Dan Murphy535247a2020-05-04 16:14:38 -0500299/**
300 * phy_set_bits_mmd - Convenience function for setting bits in a register
301 * on MMD
302 * @phydev: the phy_device struct
303 * @devad: the MMD containing register to modify
304 * @regnum: register number to modify
305 * @val: bits to set
306 * @return: 0 for success or negative errno for failure
307 */
308static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
309 u32 regnum, u16 val)
310{
311 int value, ret;
312
313 value = phy_read_mmd(phydev, devad, regnum);
314 if (value < 0)
315 return value;
316
317 value |= val;
318
319 ret = phy_write_mmd(phydev, devad, regnum, value);
320 if (ret < 0)
321 return ret;
322
323 return 0;
324}
325
326/**
327 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
328 * on MMD
329 * @phydev: the phy_device struct
330 * @devad: the MMD containing register to modify
331 * @regnum: register number to modify
332 * @val: bits to clear
333 * @return: 0 for success or negative errno for failure
334 */
335static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
336 u32 regnum, u16 val)
337{
338 int value, ret;
339
340 value = phy_read_mmd(phydev, devad, regnum);
341 if (value < 0)
342 return value;
343
344 value &= ~val;
345
346 ret = phy_write_mmd(phydev, devad, regnum, value);
347 if (ret < 0)
348 return ret;
349
350 return 0;
351}
352
Andy Fleming5f184712011-04-08 02:10:27 -0500353#ifdef CONFIG_PHYLIB_10G
354extern struct phy_driver gen10g_driver;
355
Alex Marginean98104892020-01-09 10:50:05 +0200356/*
357 * List all 10G interfaces here, the assumption being that PHYs on these
358 * interfaces are C45
359 */
Andy Fleming5f184712011-04-08 02:10:27 -0500360static inline int is_10g_interface(phy_interface_t interface)
361{
Alex Marginean98104892020-01-09 10:50:05 +0200362 return interface == PHY_INTERFACE_MODE_XGMII ||
363 interface == PHY_INTERFACE_MODE_USXGMII ||
364 interface == PHY_INTERFACE_MODE_XFI;
Andy Fleming5f184712011-04-08 02:10:27 -0500365}
366
367#endif
368
Alex Margineanc38ac282019-07-11 18:32:56 +0300369/**
370 * phy_init() - Initializes the PHY drivers
Alex Margineanc38ac282019-07-11 18:32:56 +0300371 * This function registers all available PHY drivers
372 *
Dan Murphyea756fb2020-05-04 16:14:37 -0500373 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300374 */
Andy Fleming5f184712011-04-08 02:10:27 -0500375int phy_init(void);
Alex Margineanc38ac282019-07-11 18:32:56 +0300376
377/**
378 * phy_reset() - Resets the specified PHY
Alex Margineanc38ac282019-07-11 18:32:56 +0300379 * Issues a reset of the PHY and waits for it to complete
380 *
381 * @phydev: PHY to reset
Dan Murphyea756fb2020-05-04 16:14:37 -0500382 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300383 */
Andy Fleming5f184712011-04-08 02:10:27 -0500384int phy_reset(struct phy_device *phydev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300385
386/**
387 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
Alex Margineanc38ac282019-07-11 18:32:56 +0300388 * The function checks the PHY addresses flagged in phy_mask and returns a
389 * phy_device pointer if it detects a PHY.
390 * This function should only be called if just one PHY is expected to be present
391 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
392 * it is undefined which of these PHYs is returned.
393 *
394 * @bus: MII/MDIO bus to scan
395 * @phy_mask: bitmap of PYH addresses to scan
396 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500397 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300398 */
Troy Kisky1adb4062012-10-22 16:40:43 +0000399struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
400 phy_interface_t interface);
Alex Margineanc38ac282019-07-11 18:32:56 +0300401
Simon Glassc74c8e62015-04-05 16:07:39 -0600402#ifdef CONFIG_DM_ETH
Alex Margineanc38ac282019-07-11 18:32:56 +0300403
404/**
405 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
406 * @phydev: PHY device
407 * @dev: Ethernet device
408 */
Simon Glassc74c8e62015-04-05 16:07:39 -0600409void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300410
411/**
412 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Margineanc38ac282019-07-11 18:32:56 +0300413 * Creates a PHY device for the PHY at the given address, if one doesn't exist
414 * already, and associates it with the Ethernet device.
415 * The function may be called with addr <= 0, in this case addr value is ignored
416 * and the bus is scanned to detect a PHY. Scanning should only be used if only
417 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
418 * which PHY is returned.
419 *
420 * @bus: MII/MDIO bus that hosts the PHY
421 * @addr: PHY address on MDIO bus
422 * @dev: Ethernet device to associate to the PHY
423 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500424 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300425 */
Simon Glassc74c8e62015-04-05 16:07:39 -0600426struct phy_device *phy_connect(struct mii_dev *bus, int addr,
427 struct udevice *dev,
428 phy_interface_t interface);
Alex Margineanc38ac282019-07-11 18:32:56 +0300429
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500430static inline ofnode phy_get_ofnode(struct phy_device *phydev)
431{
432 if (ofnode_valid(phydev->node))
433 return phydev->node;
434 else
435 return dev_ofnode(phydev->dev);
436}
Simon Glassc74c8e62015-04-05 16:07:39 -0600437#else
Alex Margineanc38ac282019-07-11 18:32:56 +0300438
439/**
440 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
441 * @phydev: PHY device
442 * @dev: Ethernet device
443 */
Troy Kisky1adb4062012-10-22 16:40:43 +0000444void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300445
446/**
447 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Margineanc38ac282019-07-11 18:32:56 +0300448 * Creates a PHY device for the PHY at the given address, if one doesn't exist
449 * already, and associates it with the Ethernet device.
450 * The function may be called with addr <= 0, in this case addr value is ignored
451 * and the bus is scanned to detect a PHY. Scanning should only be used if only
452 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
453 * which PHY is returned.
454 *
455 * @bus: MII/MDIO bus that hosts the PHY
456 * @addr: PHY address on MDIO bus
457 * @dev: Ethernet device to associate to the PHY
458 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500459 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300460 */
Andy Fleming5f184712011-04-08 02:10:27 -0500461struct phy_device *phy_connect(struct mii_dev *bus, int addr,
462 struct eth_device *dev,
463 phy_interface_t interface);
Alex Margineanc38ac282019-07-11 18:32:56 +0300464
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500465static inline ofnode phy_get_ofnode(struct phy_device *phydev)
466{
467 return ofnode_null();
468}
Simon Glassc74c8e62015-04-05 16:07:39 -0600469#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500470int phy_startup(struct phy_device *phydev);
471int phy_config(struct phy_device *phydev);
472int phy_shutdown(struct phy_device *phydev);
473int phy_register(struct phy_driver *drv);
Alexey Brodkinb18acb02016-01-13 16:59:34 +0300474int phy_set_supported(struct phy_device *phydev, u32 max_speed);
Andy Fleming5f184712011-04-08 02:10:27 -0500475int genphy_config_aneg(struct phy_device *phydev);
Troy Kisky8682aba2012-02-07 14:08:48 +0000476int genphy_restart_aneg(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500477int genphy_update_link(struct phy_device *phydev);
Yegor Yefremove2043f52012-11-28 11:15:17 +0100478int genphy_parse_link(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500479int genphy_config(struct phy_device *phydev);
480int genphy_startup(struct phy_device *phydev);
481int genphy_shutdown(struct phy_device *phydev);
482int gen10g_config(struct phy_device *phydev);
483int gen10g_startup(struct phy_device *phydev);
484int gen10g_shutdown(struct phy_device *phydev);
485int gen10g_discover_mmds(struct phy_device *phydev);
486
Florian Fainelli137963d2017-12-09 14:59:54 -0800487int phy_b53_init(void);
Kevin Smith24ae3962016-03-31 19:33:12 +0000488int phy_mv88e61xx_init(void);
Shaohui Xief7c38cf2014-12-30 18:32:04 +0800489int phy_aquantia_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500490int phy_atheros_init(void);
491int phy_broadcom_init(void);
Shengzhou Liu9b18e512014-11-10 18:32:29 +0800492int phy_cortina_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500493int phy_davicom_init(void);
Matt Porterf485c8a2013-03-20 05:38:13 +0000494int phy_et1011c_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500495int phy_lxt_init(void);
496int phy_marvell_init(void);
Alexandru Gagniucd397f7c2017-07-07 11:36:57 -0700497int phy_micrel_ksz8xxx_init(void);
498int phy_micrel_ksz90x1_init(void);
Neil Armstrong8995a962017-10-18 10:02:10 +0200499int phy_meson_gxl_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500500int phy_natsemi_init(void);
501int phy_realtek_init(void);
Vladimir Zapolskiyb6abf552011-12-29 15:18:37 +0000502int phy_smsc_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500503int phy_teranetics_init(void);
Edgar E. Iglesias721aed72015-09-25 23:46:08 -0700504int phy_ti_init(void);
Andy Fleming9082eea2011-04-07 21:56:05 -0500505int phy_vitesse_init(void);
Siva Durga Prasad Paladugued6fad32016-02-05 13:22:10 +0530506int phy_xilinx_init(void);
John Haechtena5fd13a2016-12-09 22:15:17 +0000507int phy_mscc_init(void);
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100508int phy_fixed_init(void);
Samuel Mendoza-Jonase2ffeaa2019-06-18 11:37:18 +1000509int phy_ncsi_init(void);
Siva Durga Prasad Paladuguf41e5882018-11-27 11:49:11 +0530510int phy_xilinx_gmii2rgmii_init(void);
Timur Tabia8366262011-10-18 18:44:34 -0500511
Fabio Estevam2fb63962014-02-15 14:52:00 -0200512int board_phy_config(struct phy_device *phydev);
Shengzhou Liu5707d5f2015-04-07 18:46:32 +0800513int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
Fabio Estevam2fb63962014-02-15 14:52:00 -0200514
Simon Glassc74c8e62015-04-05 16:07:39 -0600515/**
516 * phy_get_interface_by_name() - Look up a PHY interface name
517 *
518 * @str: PHY interface name, e.g. "mii"
Dan Murphyea756fb2020-05-04 16:14:37 -0500519 * @return: PHY_INTERFACE_MODE_... value, or -1 if not found
Simon Glassc74c8e62015-04-05 16:07:39 -0600520 */
521int phy_get_interface_by_name(const char *str);
522
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500523/**
524 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
525 * is RGMII (all variants)
526 * @phydev: the phy_device struct
Dan Murphyea756fb2020-05-04 16:14:37 -0500527 * @return: true if MII bus is RGMII or false if it is not
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500528 */
529static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
530{
531 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
532 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
533}
534
Dan Murphy3c221af2016-05-02 15:46:01 -0500535/**
536 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
537 * is SGMII (all variants)
538 * @phydev: the phy_device struct
Dan Murphyea756fb2020-05-04 16:14:37 -0500539 * @return: true if MII bus is SGMII or false if it is not
Dan Murphy3c221af2016-05-02 15:46:01 -0500540 */
541static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
542{
543 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
544 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
545}
546
Timur Tabia8366262011-10-18 18:44:34 -0500547/* PHY UIDs for various PHYs that are referenced in external code */
Priyanka Jain1ddcf5e2018-10-11 04:47:05 +0000548#define PHY_UID_CS4340 0x13e51002
549#define PHY_UID_CS4223 0x03e57003
550#define PHY_UID_TN2020 0x00a19410
551#define PHY_UID_IN112525_S03 0x02107440
Timur Tabia8366262011-10-18 18:44:34 -0500552
Andy Fleming5f184712011-04-08 02:10:27 -0500553#endif