| Ajay Bhargav | 0c44229 | 2011-08-22 17:57:38 +0530 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2011 |
| 3 | * eInfochips Ltd. <www.einfochips.com> |
| 4 | * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com> |
| 5 | * |
| 6 | * (C) Copyright 2010 |
| 7 | * Marvell Semiconductor <www.marvell.com> |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 25 | * MA 02110-1301 USA |
| 26 | */ |
| 27 | |
| 28 | #ifndef __MVGPIO_H__ |
| 29 | #define __MVGPIO_H__ |
| 30 | |
| 31 | #include <common.h> |
| 32 | |
| 33 | #ifdef CONFIG_SHEEVA_88SV331xV5 |
| 34 | /* |
| 35 | * GPIO Register map for SHEEVA 88SV331xV5 |
| 36 | */ |
| 37 | struct gpio_reg { |
| 38 | u32 gplr; /* Pin Level Register - 0x0000 */ |
| 39 | u32 pad0[2]; |
| 40 | u32 gpdr; /* Pin Direction Register - 0x000C */ |
| 41 | u32 pad1[2]; |
| 42 | u32 gpsr; /* Pin Output Set Register - 0x0018 */ |
| 43 | u32 pad2[2]; |
| 44 | u32 gpcr; /* Pin Output Clear Register - 0x0024 */ |
| 45 | u32 pad3[2]; |
| 46 | u32 grer; /* Rising-Edge Detect Enable Register - 0x0030 */ |
| 47 | u32 pad4[2]; |
| 48 | u32 gfer; /* Falling-Edge Detect Enable Register - 0x003C */ |
| 49 | u32 pad5[2]; |
| 50 | u32 gedr; /* Edge Detect Status Register - 0x0048 */ |
| 51 | u32 pad6[2]; |
| 52 | u32 gsdr; /* Bitwise Set of GPIO Direction Register - 0x0054 */ |
| 53 | u32 pad7[2]; |
| 54 | u32 gcdr; /* Bitwise Clear of GPIO Direction Register - 0x0060 */ |
| 55 | u32 pad8[2]; |
| 56 | u32 gsrer; /* Bitwise Set of Rising-Edge Detect Enable |
| 57 | Register - 0x006C */ |
| 58 | u32 pad9[2]; |
| 59 | u32 gcrer; /* Bitwise Clear of Rising-Edge Detect Enable |
| 60 | Register - 0x0078 */ |
| 61 | u32 pad10[2]; |
| 62 | u32 gsfer; /* Bitwise Set of Falling-Edge Detect Enable |
| 63 | Register - 0x0084 */ |
| 64 | u32 pad11[2]; |
| 65 | u32 gcfer; /* Bitwise Clear of Falling-Edge Detect Enable |
| 66 | Register - 0x0090 */ |
| 67 | u32 pad12[2]; |
| 68 | u32 apmask; /* Bitwise Mask of Edge Detect Register - 0x009C */ |
| 69 | }; |
| 70 | #else |
| 71 | #error "CPU core subversion not defined" |
| 72 | #endif |
| 73 | |
| 74 | #endif /* __MVGPIO_H__ */ |